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Saied Hemati
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2020 – today
- 2020
- [i4]Niloofar Hezarjaribi, Zhila Esna Ashari, James F. Frenzel, Hassan Ghasemzadeh, Saied Hemati:
Personality Assessment from Text for Machine Commonsense Reasoning. CoRR abs/2004.09275 (2020)
2010 – 2019
- 2019
- [j20]Hossein Mani
, Saied Hemati
:
Symbol-Level Stochastic Chase Decoding of Reed-Solomon and BCH Codes. IEEE Trans. Commun. 67(8): 5241-5252 (2019) - [j19]Niloofar Hezarjaribi, Sepideh Mazrouee, Saied Hemati, Naomi Chaytor
, Martine Perrigue, Hassan Ghasemzadeh:
Human-in-the-loop Learning for Personalized Diet Monitoring from Unstructured Mobile Data. ACM Trans. Interact. Intell. Syst. 9(4): 23:1-23:24 (2019) - 2018
- [j18]Andrew J. Wong, Saied Hemati, Warren J. Gross:
A Modular Architecture for Structured Long Block-Length LDPC Decoders. J. Signal Process. Syst. 90(1): 29-38 (2018) - [c18]Parviz Khaledian, Brian K. Johnson, Saied Hemati:
Power Grid Resiliency Improvement Through Remedial Action Schemes. IECON 2018: 774-779 - [c17]Saied Hemati:
Dynamics of ML Approaching Randomized Decoders on Graphs with Cycles. MWSCAS 2018: 725-728 - 2017
- [i3]Hossein Mani, Saied Hemati:
Symbolic Stochastic Chase Decoding of Reed-Solomon and BCH Codes. CoRR abs/1707.04390 (2017) - 2016
- [j17]Saied Hemati, François Leduc-Primeau, Warren J. Gross:
A Relaxed Min-Sum LDPC Decoder With Simplified Check Nodes. IEEE Commun. Lett. 20(3): 422-425 (2016) - [c16]Saied Hemati, Sepideh Rahmani:
Exploiting dental implants for creating wired implantable health monitoring devices. HealthCom 2016: 1-4 - [c15]Saied Hemati:
Mitigating hardware cyber-security risks in error correcting decoders. ISTC 2016: 181-185 - 2015
- [c14]Andrew J. Wong, Saied Hemati, Warren J. Gross:
Efficient implementation of structured long block-length LDPC codes. ASAP 2015: 234-238 - [i2]Saied Hemati:
Mitigating Hardware Cyber-Security Risks in Error Correcting Decoders. CoRR abs/1505.01245 (2015) - 2014
- [j16]Kevin Cushon
, Saied Hemati, Camille Leroux, Shie Mannor
, Warren J. Gross:
High-Throughput Energy-Efficient LDPC Decoders Using Differential Binary Message Passing. IEEE Trans. Signal Process. 62(3): 619-631 (2014) - [c13]Kevin Cushon
, Saied Hemati, Shie Mannor
, Warren J. Gross:
Energy-efficient gear-shift LDPC decoders. ASAP 2014: 219-223 - 2013
- [j15]Gabi Sarkis, Saied Hemati, Shie Mannor
, Warren J. Gross:
Stochastic Decoding of LDPC Codes over GF(q). IEEE Trans. Commun. 61(3): 939-950 (2013) - [j14]François Leduc-Primeau, Saied Hemati, Shie Mannor
, Warren J. Gross:
Relaxed Half-Stochastic Belief Propagation. IEEE Trans. Commun. 61(5): 1648-1659 (2013) - [j13]Alexandru Ciobanu, Saied Hemati, Warren J. Gross:
Adaptive Multiset Stochastic Decoding of Non-Binary LDPC Codes. IEEE Trans. Signal Process. 61(16): 4100-4113 (2013) - 2012
- [j12]Guanghua He, Gabi Sarkis, Saied Hemati, Warren J. Gross, Baoming Bai:
Low-Complexity Channel-Likelihood Estimation for Non-Binary Codes and QAM. IEEE Commun. Lett. 16(6): 801-804 (2012) - [j11]François Leduc-Primeau, Saied Hemati, Shie Mannor
, Warren J. Gross:
Dithered Belief Propagation Decoding. IEEE Trans. Commun. 60(8): 2042-2047 (2012) - [c12]Romain Heloir, Camille Leroux, Saied Hemati, Matthieu Arzel, Warren J. Gross:
Stochastic chase decoder for reed-solomon codes. NEWCAS 2012: 5-8 - [i1]François Leduc-Primeau, Saied Hemati, Shie Mannor, Warren J. Gross:
Relaxed Half-Stochastic Belief Propagation. CoRR abs/1205.2428 (2012) - 2010
- [j10]Camille Leroux, Saied Hemati, Shie Mannor
, Warren J. Gross:
Stochastic Chase Decoding of Reed-Solomon Codes. IEEE Commun. Lett. 14(9): 863-865 (2010) - [j9]Kevin Cushon
, Camille Leroux, Saied Hemati, Shie Mannor
, Warren J. Gross:
A Min-Sum Iterative Decoder Based on Pulsewidth Message Encoding. IEEE Trans. Circuits Syst. II Express Briefs 57-II(11): 893-897 (2010) - [j8]Saied Hemati, Abbas Yongaçoglu:
Dynamics of analog decoders for different message representation domains. IEEE Trans. Commun. 58(3): 721-723 (2010) - [j7]Saied Hemati, Abbas Yongaçoglu:
On the Dynamics of Analog Min-Sum Iterative Decoders: An Analytical Approach. IEEE Trans. Commun. 58(8): 2225-2231 (2010) - [j6]Saeed Sharifi Tehrani, Ali Naderi, Guy-Armand Kamendje, Saied Hemati, Shie Mannor
, Warren J. Gross:
Majority-based tracking forecast memories for stochastic LDPC decoding. IEEE Trans. Signal Process. 58(9): 4883-4896 (2010) - [c11]Gabi Sarkis, Saied Hemati, Shie Mannor
, Warren J. Gross:
Relaxed half-stochastic decoding of LDPC codes over GF(q). Allerton 2010: 36-41 - [c10]François Leduc-Primeau, Saied Hemati, Shie Mannor
, Warren J. Gross:
Lowering Error Floors Using Dithered Belief Propagation. GLOBECOM 2010: 1-6
2000 – 2009
- 2009
- [j5]Nastaran Mobini, Amir H. Banihashemi, Saied Hemati:
A differential binary message-passing LDPC decoder. IEEE Trans. Commun. 57(9): 2518-2523 (2009) - [c9]François Leduc-Primeau, Saied Hemati, Warren J. Gross, Shie Mannor
:
A Relaxed Half-Stochastic Iterative Decoder for LDPC Codes. GLOBECOM 2009: 1-6 - 2007
- [j4]Saied Hemati, Amir H. Banihashemi:
Convergence Speed and Throughput of Analog Decoders. IEEE Trans. Commun. 55(5): 833-836 (2007) - [c8]Nastaran Mobini, Amir H. Banihashemi, Saied Hemati:
A Differential Binary Message-Passing LDPC Decoder. GLOBECOM 2007: 1561-1565 - [c7]Saied Hemati, Abbas Yongaçoglu:
On the Dynamics of Analog Min-Sum Iterative Decoders, an Analytical Approach. ISIT 2007: 326-330 - 2006
- [j3]Saied Hemati, Amir H. Banihashemi, Calvin Plett:
A 0.18-$muhbox m$CMOS Analog Min-Sum Iterative Decoder for a (32, 8) Low-Density Parity-Check (LDPC) Code. IEEE J. Solid State Circuits 41(11): 2531-2540 (2006) - [j2]Saied Hemati, Amir H. Banihashemi:
Dynamics and performance analysis of analog iterative decoding for low-density parity-check (LDPC) codes. IEEE Trans. Commun. 54(1): 61-70 (2006) - 2005
- [c6]Saied Hemati, Amir H. Banihashemi, Calvin Plett:
An 80-Mb/s 0.18-μm CMOS analog min-sum iterative decoder for a (32, 8, 10) LDPC code. CICC 2005: 243-246 - [c5]Saied Hemati, Amir H. Banihashemi, Calvin Plett:
A high-speed analog min-sum iterative decoder. ISIT 2005: 1768-1772 - 2004
- [j1]Mohammadreza Yazdani, Saied Hemati, Amir H. Banihashemi:
Improving belief propagation on graphs with cycles. IEEE Commun. Lett. 8(1): 57-59 (2004) - [c4]Saied Hemati, Amir H. Banihashemi:
Comparison between continuous-time asynchronous and discrete-time synchronous iterative decoding. GLOBECOM 2004: 356-360 - [c3]Saied Hemati, Amir H. Banihashemi:
On the dynamics of continuous-time analog iterative decoding. ISIT 2004: 262 - 2003
- [c2]Saied Hemati, Amir H. Banihashemi:
Iterative decoding in analog CMOS. ACM Great Lakes Symposium on VLSI 2003: 15-20 - [c1]Saied Hemati, Amir H. Banihashemi:
A current mode maximum winner-take-all circuit with low voltage requirement for min-sum analog iterative decoders. ICECS 2003: 4-7
Coauthor Index
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