Marc Renaudin

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Yannick Monnet

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Publications

2009
[c74]
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Rodrigo Possamai Bastos, Yannick Monnet, Gilles Sicard, Fernanda Lima Kastensmidt, Marc Renaudin, Ricardo Reis:
Comparing transient-fault effects on synchronous and on asynchronous circuits. IOLTS 2009: 29-34
2007
[c61]
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  - conf/iolts/MonnetRL07
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Yannick Monnet, Marc Renaudin, Régis Leveugle:
Formal Analysis of Quasi Delay Insensitive Circuits Behavior in the Presence of SEUs. IOLTS 2007: 113-120
2006
[j7]
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  - journals/tc/MonnetRL06
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Yannick Monnet, Marc Renaudin, Régis Leveugle:
Designing Resistant Circuits against Malicious Faults Injection Using Asynchronous Logic. IEEE Trans. Computers 55(9): 1104-1115 (2006)
[c52]
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  - conf/fdtc/MonnetRLCM06
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Yannick Monnet, Marc Renaudin, Régis Leveugle, Christophe Clavier, Pascal Moitrel:
Case Study of a Fault Attack on Asynchronous DES Crypto-Processors. FDTC 2006: 88-97
[c50]
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Marc Renaudin, Yannick Monnet:
Asynchronous Design: Fault Robustness and Security Characteristics. IOLTS 2006: 92-95
[c49]
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  - conf/iolts/MonnetRLFMN06
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Yannick Monnet, Marc Renaudin, Régis Leveugle, Nathalie Feyt, Pascal Moitrel, F. M'Buwa Nzenguet:
Practical Evaluation of Fault Countermeasures on an Asynchronous DES Crypto Processor. IOLTS 2006: 125-130
2005
[c44]
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  - conf/dac/MonnetRL05
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Yannick Monnet, Marc Renaudin, Régis Leveugle:
Asynchronous circuits transient faults sensitivity evaluation. DAC 2005: 863-868
[c37]
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Yannick Monnet, Marc Renaudin, Régis Leveugle:
Hardening Techniques against Transient Faults for Asynchronous Circuits. IOLTS 2005: 129-134
2004
[c26]
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  - conf/iolts/MonnetRL04
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Yannick Monnet, Marc Renaudin, Régis Leveugle:
Asynchronous Circuits Sensitivity to Fault Injection. IOLTS 2004: 121-128

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