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ORCIDThe Journal of Signal Processing Systems, Volume 53
Volume 53, Numbers 1-2, November 2008
- Wayne Luk, Yvon Savaria, Oskar Mencer:
Guest Editorial: 20 Years of ASAP. 1-2 - Earl E. Swartzlander Jr.:
Systolic FFT Processors: A Personal Perspective. 3-14 - Kung Yao, Flavio Lorenzelli:
Systolic Algorithms and Architectures for High-Throughput Processing Applications. 15-34 - Roger F. Woods
, John V. McCanny, John G. McWhirter:
From Bit Level Systolic Arrays to HDTV Processor Chips. 35-49 - Florin Balasa, Per Gunnar Kjeldsberg, Arnout Vandecappelle, Martin Palkovic, Qubo Hu, Hongwei Zhu, Francky Catthoor:
Storage Estimation and Design Space Exploration Methodologies for the Memory Management of Signal Processing Applications. 51-71 - Marjan Karkooti, Predrag Radosavljevic, Joseph R. Cavallaro:
Configurable LDPC Decoder Architectures for Regular and Irregular Codes. 73-88 - Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede:
Design Methodology for Throughput Optimum Architectures of Hash Algorithms of the MD4-class. 89-102 - Francisco J. Jaime, Julio Villalba, Javier Hormigo, Emilio L. Zapata:
Pipelined Architecture for Additive Range Reduction. 103-112 - Grant Martin:
Multi-Processor SoC-Based Design Methodologies Using Configurable and Extensible Processors. 113-127 - Bernd Neumann, Thorsten von Sydow, Holger Blume, Tobias G. Noll:
Application Domain Specific Embedded FPGAs for Flexible ISA-Extension of ASIPs. 129-143 - Yedidya Hilewitz, Ruby B. Lee:
Fast Bit Gather, Bit Scatter and Bit Permutation Instructions for Commodity Microprocessors. 145-169 - Richard Hughey, Andrea Di Blas:
Finding the Next Computational Model: Experience with the UCSC Kestrel. 171-186 - Brent E. Nelson, Brad L. Hutchings, Michael J. Wirthlin:
Design, Debug, Deploy: The Creation of Configurable Computing Applications. 187-196 - Peter R. Cappello:
Application-specific Processor Architecture: Then and Now. 197-215 - Yen-Kuang Chen, Sun-Yuan Kung:
Trend and Challenge on System-on-a-Chip Designs. 217-229
Volume 53, Number 3, December 2008
- Curt Schurgers, Anantha P. Chandrakasan:
Traceback-Based Optimizations for Maximum a Posteriori Decoding Algorithms. 231-241 - Zhiyi Yu, Michael J. Meeuwsen, Ryan W. Apperson, Omar Sattari, Michael A. Lai, Jeremy W. Webb, Eric W. Work, Tinoosh Mohsenin, Bevan M. Baas:
Architecture and Evaluation of an Asynchronous Array of Simple Processors. 243-259 - Reeba Korah, J. Raja Paul Perinbam:
FPGA Implementation of Integer Transform and Quantizer for H.264 Encoder. 261-269 - Guillermo Talavera, Murali Jayapala, Jordi Carrabina, Francky Catthoor:
Address Generation Optimization for Embedded High-Performance Processors: A Survey. 271-284 - Yi-Hau Chen, Shao-Yi Chien, Ching-Yeh Chen, Yu-Wen Huang, Liang-Gee Chen:
Analysis and Hardware Architecture Design of Global Motion Estimation. 285-300 - Per Gunnar Kjeldsberg, Francky Catthoor, Sven Verdoolaege, Martin Palkovic, Arnout Vandecappelle, Qubo Hu, Einar J. Aas:
Guidance of Loop Ordering for Reduced Memory Usage in Signal Processing Applications. 301-321 - Tsung-Han Tsai, Chun-Nan Liu:
A Low-Latency Multi-layer Prefix Grouping Technique for Parallel Huffman Decoding of Multimedia Standards. 323-333 - Yi-Hau Chen, Tung-Chien Chen, Shao-Yi Chien, Yu-Wen Huang, Liang-Gee Chen:
VLSI Architecture Design of Fractional Motion Estimation for H.264/AVC. 335-347 - François Nougarou, Daniel Massicotte, Messaoud Ahmed Ouameur:
Adaptive Duplicated Filters and Interference Canceller for DS-CDMA Systems. 349-365 - Rafael A. Arce-Nazario, Manuel Jiménez, Domingo Rodríguez:
Mapping of Discrete Cosine Transforms onto Distributed Hardware Architectures. 367-382 - Jae Hyun Baek, Sung Dae Kim, Myung Hoon Sunwoo:
SPOCS: Application Specific Signal Processor for OFDM Communication Systems. 383-397 - Jongsun Park, Kaushik Roy:
A Low Complexity Reconfigurable DCT Architecture to Trade off Image Quality for Power Consumption. 399-410 - Eleftheria Athanasopoulou, Christoforos N. Hadjicostis:
Bounds on FSM Switching Activity. 411-418 - Dimitrios E. Maroulis, Dimitrios K. Iakovidis, Dimitris G. Bariamis:
FPGA-based System for Real-Time Video Texture Analysis. 419-433 - Yun-Nan Chang, Ting-Chi Tong:
An Efficient Design of H.264 Inter Interpolator with Bandwidth Optimization. 435-448
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