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18th NANOARCH 2023: Dresden, Germany
- Ronald Tetzlaff, Fernando Corinto, Neil Kemp, Alon Ascoli, Andreas Mögel, Meng-Fan Marvin Chang, Joseph S. Friedman, Siting Liu, John Paul Strachan, Stephan Menzel, Mehdi B. Tahoori, Martin Ziegler, Jason Eshraghian, Ioannis Messaris, Christian Koitzsch, Thomas Mikolajick, Vasileios G. Ntinas:
Proceedings of the 18th ACM International Symposium on Nanoscale Architectures, NANOARCH 2023, Dresden, Germany, December 18-20, 2023. ACM 2023 - Amandeep Singh Rehal
:
Low power Circuit Design Using Dynamic GDI Technique in CNTFET Technology. 1:1-1:5 - Mohamad Moner Al Chawa
, Ronald Tetzlaff
, Christos Tjortjis
, Stavros G. Stavrinides
, Carol de Benito
, Rodrigo Picos
:
A Behavioural Compact Model for Programmable Neuromorphic ReRAM. 2:1-2:3 - Stefan Slesazeck
, Suzanne Lancaster
, John Reuben
, Shima Hosseinzadeh
, Dietmar Fey
, Thomas Mikolajick
:
Hyper Dimensional Computing with Ferroelectric Tunneling Junctions. 3:1-3:2 - Jiaming Li
, Bin Gao
, Ruihua Yu
, Peng Yao
, Jianshi Tang
, He Qian
, Huaqiang Wu
:
A Spatial-Designed Computing-In-Memory Architecture Based on Monolithic 3D Integration for High-Performance Systems. 4:1-4:6 - Jan Drewniok
, Marcel Walter
, Robert Wille
:
Minimal Design of SiDB Gates: An Optimal Basis for Circuits Based on Silicon Dangling Bonds. 5:1-5:6 - Md. Shahanur Alam, Chris Yakopcic
, Tarek M. Taha
:
On-Chip Optimization and Deep Reinforcement Learning in Memristor Based Computing. 6:1-6:7 - Houji Zhou
, Zhiwei Zhou
, Shengguang Ren
, Jia Chen
, Yi Li
, Xiangshui Miao
:
Heterogeneous Instruction Set Architecture for RRAM-enabled In-memory Computing. 7:1-7:6 - Raqibul Hasan
:
Robust Ex-situ Training of Memristor Crossbar-based Neural Network with Limited Precision Weights. 8:1-8:7 - Marcel Walter
, Jan Drewniok
, Samuel Sze Hang Ng
, Konrad Walus
, Robert Wille
:
Reducing the Complexity of Operational Domain Computation in Silicon Dangling Bond Logic. 9:1-9:6 - Simon Toni Hofmann
, Marcel Walter
, Robert Wille
:
Post-Layout Optimization for Field-coupled Nanotechnologies. 10:1-10:6 - Kristoffer Schnieders
, Stephan Aussen
, Felix Cüppers
, Susanne Hoffmann-Eifert
, Stefan Wiefels
:
Impact of the switching mode on the read noise of ReRAM devices. 11:1-11:3 - Haibin Zhao
, Priyanjana Pal
, Michael Hefenbrock
, Michael Beigl
, Mehdi Baradaran Tahoori
:
Towards Temporal Information Processing - Printed Neuromorphic Circuits with Learnable Filters. 12:1-12:6 - Qianlei Ou
, Shixing Li
, Chao Wang
, He Zhang
, Zhaohao Wang
:
A Robust Time-based Error-Proofing Readout Scheme for MRAM. 13:1-13:3 - Christof Teuscher
:
Material and Physical Reservoir Computing for Beyond CMOS Electronics: Quo Vadis? 14:1-14:5 - Alban Nicolas
, Cédric Marchand
, David Navarro
:
Non Volatile Operators Emulation Platform. 15:1-15:6 - Osama Yousuf
, Imtiaz Hossen
, Andreu Glasmann
, Sina Najmaei
, Gina C. Adam
:
Neural Network Modeling Bias for Hafnia-based FeFETs. 16:1-16:5 - Paul-Philipp Manea
, Chirag Sudarshan
, Felix Cüppers
, John Paul Strachan
:
Non-idealities and Design Solutions for Analog Memristor-Based Content-Addressable Memories. 17:1-17:6 - Sercan Aygun
, M. Hassan Najafi
, Lida Kouhalvandi
, Ece Olcay Günes
:
Multiplexer Optimization for Adders in Stochastic Computing. 18:1-18:2 - Ayoub H. Jaafar
, Neil T. Kemp
:
Optically Controlled Memristor Using Hybrid ZnO Nanorod/Polymer Material. 19:1-19:5 - Yijun Cui
, Jiang Li
, Chongyan Gu
, Chenghua Wang
, Weiqiang Liu
:
An RRAM-based PUF with Adjustable Programmable Voltage and Multi-Mode Operation. 20:1-20:5 - Ioana Moflic
, Alexandru Paler
:
Towards Faster Reinforcement Learning of Quantum Circuit Optimisation: Exponential Reward Functions. 21:1-21:2 - Pengbin Li
, Zhengyi Hou
, Hanran Gao
, Bi Wang
, Zhaohao Wang
:
A Reconfigurable and Machine Learning attack resistant strong PUF based on Arbiter Mechanism and SOT-MRAM. 22:1-22:4 - Dimitrios A. Prousalis
, Vasileios G. Ntinas
, Ioannis Messaris
, Ahmet Samil Demirkol
, Alon Ascoli
, Ronald Tetzlaff
:
Stochastic template in cellular nonlinear networks modeling memristor induced synaptic noise. 23:1-23:3 - Lennart Weingarten
, Kamalika Datta
, Rolf Drechsler
:
PolyMiR: Polynomial Formal Verification of the MicroRV32 Processor. 24:1-24:6 - Soumya Chakraborty
, Arup Samanta
:
Single Electron Shuttling between N-Donor and Si/SiO2 Interface at Room Temperature. 25:1-25:4 - Panagiotis Mougkogiannis
, Andrew Adamatzky
:
Electrical Properties of Proteinoids for Unconventional Computing Architectures. 26:1-26:4 - Mehran Shoushtari Moghadam
, Sercan Aygun
, Mohsen Riahi Alam
, Jonas I Schmidt
, M. Hassan Najafi
, Nima Taherinejad
:
Accurate and Energy-Efficient Stochastic Computing with Van Der Corput Sequences. 27:1-27:6 - Amirhossein Parvaresh
, Shima Hosseinzadeh
, Dietmar Fey
:
Resilience and Precision Assessment of Natural Language Processing Algorithms in Analog In-Memory Computing: A Hardware-Aware Study. 28:1-28:6 - Asal Kiazadeh
, Jonas Deuermeier
, Emanuel Carlos
, Rodrigo Martins
, Sérgio A. Matos, Fabio Martinho Cardoso
, Luis Manuel Pessoa
:
Concept paper on novel radio frequency resistive switches. 29:1-29:3 - Simranjeet Singh
, Elmira Moussavi
, Christopher Bengel
, Sachin B. Patkar
, Rainer Waser
, Rainer Leupers
, Vikas Rana
, Vivek Pachauri
, Stephan Menzel
, Farhad Merchant
:
Exploring Multi-Valued Logic and its Application in Emerging Post-CMOS Technologies. 30:1-30:7 - Arne Van Zegbroeck
, Pantazis Anagnostou
, Said Hamdioui
, Christoph Adelmann
, Florin Ciubotaru
, Sorin Cotofana
:
Spin Wave Threshold Logic Gates. 31:1-31:6 - Alexandru Paler
, Evan E. Dobbs
, Joseph S. Friedman
:
A T-depth two Toffoli gate for 2D square lattice architectures. 32:1-32:2 - Shuo Ran
, Bi Wu
, Ke Chen
, Weiqiang Liu
:
VLCP: A High-Performance FPGA-based CNN Accelerator with Vector-level Cluster Pruning. 33:1-33:6 - Saad Saleh
, Boris Koldehofe
:
Memristor-based Network Switching Architecture for Energy Efficient Cognitive Computational Models. 34:1-34:4 - Max Uhlmann
, Tommaso Rizzi
, Jianan Wen
, Emilio Pérez-Bosch Quesada
, Bakr Al Beattie
, Karlheinz Ochs
, Eduardo Pérez
, Philip Ostrovskyy
, Corrado Carta
, Christian Wenger
, Gerhard Kahmen
:
LUT-based RRAM Model for Neural Accelerator Circuit Simulation. 35:1-35:6 - Yongmin Wang
, Kristoffer Schnieders
, Vasileios G. Ntinas
, Alon Ascoli
, Felix Cüppers
, Susanne Hoffmann-Eifert
, Stefan Wiefels
, Ronald Tetzlaff
, Vikas Rana
, Stephan Menzel
:
Experimental Verification of Uncoupled Memristive Cellular Nonlinear Network by Processing the EDGE Detection Task. 36:1-36:7 - Michael Gater
, Ali M. Adawi
, Neil T. Kemp
:
Enhanced Switching in Solid Polymer Electrolyte Memristor Devices via the addition of Interfacial Barriers and Quantum Dots. 37:1-37:4
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