Jayanta Bhadra

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Sandip Ray

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Publications

2017
[j10]
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Wen Chen, Sandip Ray, Jayanta Bhadra, Magdy S. Abadir, Li-C. Wang:
Challenges and Trends in Modern SoC Design Verification. IEEE Des. Test 34(5): 7-22 (2017)
[c41]
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  - conf/dac/RayCBF17
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Sandip Ray, Wen Chen, Jayanta Bhadra, Mohammad Abdullah Al Faruque:
Extensibility in Automotive Security: Current Practice and Challenges: Invited. DAC 2017: 14:1-14:6
2016
[c39]
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  - conf/socc/RayB16
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Sandip Ray, Jayanta Bhadra:
Security challenges in mobile and IoT systems. SoCC 2016: 356-361
2013
[j8]
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  - journals/et/RayBAW13
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Sandip Ray, Jay Bhadra, Magdy S. Abadir, Li-C. Wang:
Guest Editorial: Test and Verification Challenges for Future Microprocessors and SoC Designs. J. Electron. Test. 29(5): 621-623 (2013)
2012
[j7]
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Sandip Ray, Jayanta Bhadra, Magdy S. Abadir, Li-C. Wang, Aarti Gupta:
Introduction to special section on verification challenges in the concurrent world. ACM Trans. Design Autom. Electr. Syst. 17(3): 19:1-19:3 (2012)
2011
[c31]
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  - conf/mtv/OlivoRBV11
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Oswaldo Olivo, Sandip Ray, Jayanta Bhadra, Vivekananda M. Vedula:
A Unified Formal Framework for Analyzing Functional and Speed-path Properties. MTV 2011: 44-45
2010
[c30]
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  - conf/isqed/RayBPS10
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Sandip Ray, Jayanta Bhadra, Thomas Portlock, Ronald Syzdek:
Modeling and verification of industrial flash memories. ISQED 2010: 705-712
[c28]
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  - conf/vts/RayB10
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Sandip Ray, Jayanta Bhadra:
Innovative practices session 7C: Verification and testing challenges in high-level synthesis. VTS 2010: 250
2007
[j4]
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Jayanta Bhadra, Magdy S. Abadir, Li-C. Wang, Sandip Ray:
A Survey of Hybrid Techniques for Functional Verification. IEEE Des. Test Comput. 24(2): 112-122 (2007)
[c20]
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  - conf/fmcad/RayB07
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Sandip Ray, Jayanta Bhadra:
A Mechanized Refinement Framework for Analysis of Custom Memories. FMCAD 2007: 239-242

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