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ORCIDRicardo Augusto da Luz Reis
Publications
- 2012
[j22]Renato Fernandes Hentschke, Marcelo O. Johann, Ricardo Reis:
Posicionamento de Circuitos 3D Considerando o Planejamento de 3D-Vias. RITA 19(1): 28-45 (2012)- 2009
- [j16]Renato Fernandes Hentschke, Jagannathan Narasimhan, Marcelo O. Johann, Ricardo Reis:
Maze Routing Steiner Trees With Delay Versus Wire Length Tradeoff. IEEE Trans. Very Large Scale Integr. Syst. 17(8): 1073-1086 (2009) - 2007
- [c92]Renato Fernandes Hentschke, Ricardo Reis:
A 3D-Via Legalization Algorithm for 3D VLSI Circuits and its Impact on Wire Length. ISCAS 2007: 2036-2039 - [c91]Renato Fernandes Hentschke, Jaganathan Narasimham, Marcelo O. Johann, Ricardo Augusto da Luz Reis:
Maze routing steiner trees with effective critical sink optimization. ISPD 2007: 135-142 - [c90]Renato Fernandes Hentschke, Guilherme Flach, Felipe Pinto, Ricardo Reis:
3D-Vias Aware Quadratic Placement for 3D VLSI Circuits. ISVLSI 2007: 67-72 - [c85]Guilherme Flach, Marcelo O. Johann, Renato Fernandes Hentschke, Ricardo Reis:
Cell placement on graphics processing units. SBCCI 2007: 87-92 - 2006
- [c78]Sandro Sawicki
, Renato Fernandes Hentschke, Marcelo O. Johann, Ricardo Reis:
Unbalacing the I/O Pins Partitioning for Minimizing Inter-Tier Vias in 3D VLSI Circuits. ICECS 2006: 399-402 - [c67]Renato Fernandes Hentschke, Guilherme Flach, Felipe Pinto, Ricardo Reis:
Quadratic placement for 3d circuits using z-cell shifting, 3d iterative refinement and simulated annealing. SBCCI 2006: 220-225 - [c66]Renato Fernandes Hentschke, Sandro Sawicki, Marcelo O. Johann, Ricardo Augusto da Luz Reis:
An Algorithm for I/O Partitioning Targeting 3D Circuits and Its Impact on 3D-Vias. VLSI-SoC 2006: 128-133 - [c65]Renato Fernandes Hentschke, Sandro Sawicki, Marcelo O. Johann, Ricardo Reis:
A Method for I/O Pins Partitioning Targeting 3D VLSI Circuits. VLSI-SoC (Selected Papers) 2006: 259-279 - 2005
- [c62]Renato Fernandes Hentschke, Marcelo O. Johann, Ricardo Reis:
Blue Macaw: A Didactic Placement Tool Using Simulated Annealing. EDUTECH 2005: 37-47 - 2004
- [j8]Fernanda Lima Kastensmidt, Gustavo Neuberger, Renato Fernandes Hentschke, Luigi Carro, Ricardo Reis:
Designing Fault-Tolerant Techniques for SRAM-Based FPGAs. IEEE Des. Test Comput. 21(6): 552-562 (2004) - 2003
- [c42]Renato Fernandes Hentschke, Ricardo Reis:
Plic-Plac: a novel constructive algorithm for placement. ISCAS (5) 2003: 461-464 - [c38]Renato Fernandes Hentschke, Ricardo Augusto da Luz Reis:
Improving Simulated Annealing Placement by Applying Random and Greedy Mixed Perturbations. SBCCI 2003: 267- - [c33]Renato Fernandes Hentschke, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis:
A study on the performance of fast initial placement algorithms. VLSI-SOC 2003: 204- - 2002
- [c27]Renato Fernandes Hentschke, Felipe S. Marques, Fernanda Lima, Luigi Carro, Altamiro Amadeu Susin, Ricardo Reis:
Analyzing Area and Performance Penalty of Protecting Different Digital Modules with Hamming Code and Triple Modular Redundancy. SBCCI 2002: 95-100
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