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Norbert Seifert
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Publications
- 2015
- [c15]Norbert Seifert, Shah M. Jahinuzzaman, Jyothi Velamala, Nikunj Patel:
Susceptibility of planar and 3D tri-gate technologies to muon-induced single event upsets. IRPS 2015: 2 - 2007
- [c9]Subhasish Mitra, Pia N. Sanda, Norbert Seifert:
Soft Errors: Technology Trends, System Effects, and Protection Techniques. IOLTS 2007: 4 - [c8]Ming Zhang, T. M. Mak, James W. Tschanz, Kee Sup Kim, Norbert Seifert, Davia Lu:
Design for Resilience to Soft Errors and Variations. IOLTS 2007: 23-28 - 2006
- [j2]Ming Zhang, Subhasish Mitra, T. M. Mak, Norbert Seifert, Nicholas J. Wang, Quan Shi, Kee Sup Kim, Naresh R. Shanbhag, Sanjay J. Patel:
Sequential Element Design With Built-In Soft Error Resilience. IEEE Trans. Very Large Scale Integr. Syst. 14(12): 1368-1378 (2006) - [c6]Subhasish Mitra, Ming Zhang, Saad Waqas, Norbert Seifert, Balkaran S. Gill, Kee Sup Kim:
Combinational Logic Soft Error Correction. ITC 2006: 1-9 - [c5]Subhasish Mitra, Ming Zhang, Norbert Seifert, T. M. Mak, Kee Sup Kim:
Soft Error Resilient System Design through Error Correction. VLSI-SoC (Selected Papers) 2006: 143-156 - [c4]Subhasish Mitra, Ming Zhang, Norbert Seifert, T. M. Mak, Kee Sup Kim:
Soft Error Resilient System Design through Error Correction. VLSI-SoC 2006: 332-337 - 2005
- [j1]Subhasish Mitra, Norbert Seifert, Ming Zhang, Quan Shi, Kee Sup Kim:
Subhasish Mitra, Norbert Seifert, Ming Zhang, Quan Shi, Kee Sup Kim. Computer 38(2): 43-52 (2005) - [c3]Subhasish Mitra, Tanay Karnik, Norbert Seifert, Ming Zhang:
Logic soft errors in sub-65nm technologies design and CAD challenges. DAC 2005: 2-4 - [c2]Balkaran S. Gill, Christos A. Papachristou, Francis G. Wolff, Norbert Seifert:
Node sensitivity analysis for soft errors in CMOS logic. ITC 2005: 9 - [c1]Subhasish Mitra, Ming Zhang, T. M. Mak, Norbert Seifert, Victor Zia, Kee Sup Kim:
Logic soft errors: a major barrier to robust platform design. ITC 2005: 10
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