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Jonathan Chang
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Publications
- 2022
- [c52]Victor Sanh, Albert Webson, Colin Raffel, Stephen H. Bach, Lintang Sutawika, Zaid Alyafeai, Antoine Chaffin, Arnaud Stiegler, Arun Raja, Manan Dey, M Saiful Bari, Canwen Xu, Urmish Thakker, Shanya Sharma Sharma, Eliza Szczechla, Taewoon Kim, Gunjan Chhablani, Nihal V. Nayak, Debajyoti Datta, Jonathan Chang, Mike Tian-Jian Jiang, Han Wang, Matteo Manica, Sheng Shen, Zheng Xin Yong, Harshit Pandey, Rachel Bawden, Thomas Wang, Trishala Neeraj, Jos Rozen, Abheesht Sharma, Andrea Santilli, Thibault Févry, Jason Alan Fries, Ryan Teehan, Teven Le Scao, Stella Biderman, Leo Gao, Thomas Wolf, Alexander M. Rush:
Multitask Prompted Training Enables Zero-Shot Task Generalization. ICLR 2022 - 2021
- [i4]Victor Sanh, Albert Webson, Colin Raffel, Stephen H. Bach, Lintang Sutawika, Zaid Alyafeai, Antoine Chaffin, Arnaud Stiegler, Teven Le Scao, Arun Raja, Manan Dey, M. Saiful Bari, Canwen Xu, Urmish Thakker, Shanya Sharma, Eliza Szczechla, Taewoon Kim, Gunjan Chhablani, Nihal V. Nayak, Debajyoti Datta, Jonathan Chang, Mike Tian-Jian Jiang, Han Wang, Matteo Manica, Sheng Shen, Zheng Xin Yong, Harshit Pandey, Rachel Bawden, Thomas Wang, Trishala Neeraj, Jos Rozen, Abheesht Sharma, Andrea Santilli, Thibault Févry, Jason Alan Fries, Ryan Teehan, Stella Biderman, Leo Gao, Tali Bers, Thomas Wolf, Alexander M. Rush:
Multitask Prompted Training Enables Zero-Shot Task Generalization. CoRR abs/2110.08207 (2021) - 2019
- [i3]Jonathan Chang, Nishanth Kumar, Sean Hastings, Aaron Gokaslan, Diego Romeres, Devesh K. Jha, Daniel Nikovski, George Dimitri Konidaris, Stefanie Tellex:
Learning Deep Parameterized Skills from Demonstration for Re-targetable Visuomotor Control. CoRR abs/1910.10628 (2019) - 2010
- [j7]Stefan Rusu, Simon M. Tam, Harry Muljono, Jason Stinson, David Ayers, Jonathan Chang, Raj Varada, Matt Ratta, Sailesh Kottapalli, Sujal Vora:
A 45 nm 8-Core Enterprise Xeon¯ Processor. IEEE J. Solid State Circuits 45(1): 7-14 (2010) - [c13]Cheolmin Park, Roy Badeau, Larry Biro, Jonathan Chang, Tejpal Singh, Jim Vash, Bo Wang, Tom Wang:
A 1.2 TB/s on-chip ring interconnect for 45nm 8-core enterprise Xeon® processor. ISSCC 2010: 180-181 - 2009
- [c11]Stefan Rusu, Simon M. Tam, Harry Muljono, Jason Stinson, David Ayers, Jonathan Chang, Raj Varada, Matt Ratta, Sailesh Kottapalli, Sujal Vora:
Power reduction techniques for an 8-core xeon® processor. ESSCIRC 2009: 340-343 - [c10]Stefan Rusu, Simon M. Tam, Harry Muljono, Jason Stinson, David Ayers, Jonathan Chang, Raj Varada, Matt Ratta, Sailesh Kottapalli:
A 45nm 8-core enterprise Xeon® processor. ISSCC 2009: 56-57 - 2007
- [j5]Stefan Rusu, Simon M. Tam, Harry Muljono, David Ayers, Jonathan Chang, Brian S. Cherkauer, Jason Stinson, John Benoit, Raj Varada, Justin Leung, Rahul Dilip Limaye, Sujal Vora:
A 65-nm Dual-Core Multithreaded Xeon® Processor With 16-MB L3 Cache. IEEE J. Solid State Circuits 42(1): 17-25 (2007) - [j4]Jonathan Chang, Ming Huang, Jonathan Shoemaker, John Benoit, Szu-Liang Chen, Wei Chen, Siufu Chiu, Raghuraman Ganesan, Gloria Leong, Venkata Lukka, Stefan Rusu, Durgesh Srivastava:
The 65-nm 16-MB Shared On-Die L3 Cache for the Dual-Core Intel Xeon Processor 7100 Series. IEEE J. Solid State Circuits 42(4): 846-852 (2007) - 2006
- [c6]Stefan Rusu, Simon M. Tam, Harry Muljono, David Ayers, Jonathan Chang:
A Dual-Core Multi-Threaded Xeon Processor with 16MB L3 Cache. ISSCC 2006: 315-324 - 2005
- [j2]Jonathan Chang, Stefan Rusu, Jonathan Shoemaker, Simon Tam, Ming Huang, Mizan Haque, Siufu Chiu, Kevin Truong, Mesbah Karim, Gloria Leong, Kiran Desai, Richard Goe, Sandhya Kulkarni:
A 130-nm triple-Vt 9-MB third-level on-die cache for the 1.7-GHz Itanium® 2 processor. IEEE J. Solid State Circuits 40(1): 195-203 (2005) - 2003
- [c2]Alain J. Martin, Mika Nyström, Karl Papadantonakis, Paul I. Pénzes, Piyush Prakash, Catherine G. Wong, Jonathan Chang, Kevin S. Ko, Benjamin Lee, Elaine Ou, James Pugh, Eino-Ville Talvala, James T. Tong, Ahmet Tura:
The Lutonium: A Sub-Nanojoule Asynchronous 8051 Microcontroller. ASYNC 2003: 14-23
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