SBAC-PAD 2014: Paris, France

Shared-Memory and Multi-core Systems

Performance Optimization

Energy Aware Computing

Hardware Accelerators I

Transactional Memory

Hardware Accelerators II

Memory Hierarchy

Chip-Level Optimizations

Fine-Grained Parallelism

Grid and Cloud Computing

Parallel and Distributed Systems

maintained by Schloss Dagstuhl LZI at University of Trier