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Darío Suárez Gracia
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- affiliation: Universidad de Zaragoza, Spain
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2020 – today
- 2024
- [i5]Sara Casao, Fernando Peña, Alberto Sabater, Rosa Castillón, Darío Suárez Gracia, Eduardo Montijano, Ana C. Murillo:
SpectralWaste Dataset: Multimodal Data for Waste Sorting Automation. CoRR abs/2403.18033 (2024) - 2023
- [c18]Víctor Soria Pardos
, Adrià Armejach
, Tiago Mück
, Darío Suárez Gracia
, José A. Joao
, Alejandro Rico
, Miquel Moretó
:
DynAMO: Improving Parallelism Through Dynamic Placement of Atomic Memory Operations. ISCA 2023: 30:1-30:13 - 2022
- [j19]Maria Angélica Dávila-Guzmán
, Lester Kalms
, Ruben Gran Tejero
, María Villarroya-Gaudó
, Darío Suárez Gracia
, Diana Göhringer
:
A cross-platform OpenVX library for FPGA accelerators. J. Syst. Archit. 123: 102372 (2022) - [j18]Andrés Rodríguez
, Angeles G. Navarro
, Kris Nikov
, José L. Núñez-Yáñez, Ruben Gran
, Darío Suárez Gracia
, Rafael Asenjo
:
Lightweight asynchronous scheduling in heterogeneous reconfigurable systems. J. Syst. Archit. 124: 102398 (2022) - [c17]Darío Suárez Gracia
, Alejandro Valero, Ruben Gran Tejero, María Villarroya-Gaudó, Víctor Viñals:
peRISCVcope: A Tiny Teaching-Oriented RISC-V Interpreter. DCIS 2022: 1-6 - [c16]Fernando Peña
, Pilar Vidal Aguilar, Darío Suárez Gracia, Ana C. Murillo:
Efficient Semantic Segmentation with Hyperspectral Images. ROBOT (1) 2022: 187-198 - 2021
- [j17]Alejandro Valero
, Ruben Gran Tejero
, Darío Suárez Gracia
, Emanuel A. Georgescu, Joaquín Ezpeleta
, Pedro Álvarez
, Adolfo Muñoz
, Luis M. Ramos
, Pablo Ibáñez
:
A learning experience toward the understanding of abstraction-level interactions in parallel applications. J. Parallel Distributed Comput. 156: 38-52 (2021) - [j16]Maria Angélica Dávila-Guzmán
, Ruben Gran Tejero
, María Villarroya-Gaudó, Darío Suárez Gracia
:
Analytical Model for Memory-Centric High Level Synthesis-Generated Applications. IEEE Trans. Computers 70(12): 2056-2069 (2021) - [j15]Víctor Soria Pardos
, Adrià Armejach, Darío Suárez Gracia
, Miquel Moretó
:
On the use of many-core Marvell ThunderX2 processor for HPC workloads. J. Supercomput. 77(4): 3315-3338 (2021) - [c15]Maria Angélica Dávila-Guzmán, Ruben Gran Tejero
, María Villarroya-Gaudó, Darío Suárez Gracia
, Lester Kalms, Diana Göhringer:
A Cross-Platform OpenVX Library for FPGA Accelerators. PDP 2021: 75-83 - [i4]Yamilka Toca-Díaz, Alejandro Valero, Ruben Gran Tejero, Darío Suárez Gracia:
RRCD: Redirección de Registros Basada en Compresión de Datos para Tolerar FallosPermanentes en una GPU. CoRR abs/2105.03859 (2021) - 2020
- [j14]Alejandro Valero
, Darío Suárez Gracia
, Ruben Gran Tejero
:
DC-Patch: A Microarchitectural Fault Patching Technique for GPU Register Files. IEEE Access 8: 173276-173288 (2020) - [j13]Andrés Rodríguez
, Angeles G. Navarro
, Rafael Asenjo
, Francisco Corbera, Ruben Gran
, Darío Suárez Gracia
, José L. Núñez-Yáñez:
Parallel multiprocessing and scheduling on the heterogeneous Xeon+FPGA platform. J. Supercomput. 76(6): 4645-4665 (2020) - [c14]Maria Angelica Davila Guzman, Ruben Gran Tejero
, María Villarroya-Gaudó, Darío Suárez Gracia
:
An Analytical Model of Memory-Bound Applications Compiled with High Level Synthesis. FCCM 2020: 218 - [i3]Maria Angelica Davila Guzman, Ruben Gran Tejero, María Villarroya-Gaudó, Darío Suárez Gracia:
Analytical Model of Memory-Bound Applications Compiled with High Level Synthesis. CoRR abs/2003.13054 (2020)
2010 – 2019
- 2019
- [j12]Alexandra Ferrerón-Labari, Jesús Alastruey-Benedé
, Darío Suárez Gracia
, Teresa Monreal Arnal
, Pablo Ibáñez-Marín
, Víctor Viñals Yúfera:
A fault-tolerant last level cache for CMPs operating at ultra-low voltage. J. Parallel Distributed Comput. 125: 31-44 (2019) - [j11]Andrés Rodríguez
, Angeles G. Navarro
, Rafael Asenjo, Francisco Corbera, Ruben Gran Tejero
, Darío Suárez Gracia
, José L. Núñez-Yáñez:
Exploring heterogeneous scheduling for edge computing with CPU and FPGA MPSoCs. J. Syst. Archit. 98: 27-40 (2019) - [j10]Alejandro Valero
, Francisco Candel
, Darío Suárez Gracia
, Salvador Petit
, Julio Sahuquillo
:
An Aging-Aware GPU Register File Design Based on Data Redundancy. IEEE Trans. Computers 68(1): 4-20 (2019) - [j9]Maria Angelica Davila Guzman
, Raúl Nozal
, Ruben Gran Tejero
, María Villarroya-Gaudó, Darío Suárez Gracia
, José Luis Bosque
:
Cooperative CPU, GPU, and FPGA heterogeneous execution with EngineCL. J. Supercomput. 75(3): 1732-1746 (2019) - [j8]José L. Núñez-Yáñez, Sam Amiri, Mohammad Hosseinabady
, Andrés Rodríguez
, Rafael Asenjo, Angeles G. Navarro
, Darío Suárez Gracia
, Ruben Gran
:
Simultaneous multiprocessing in a software-defined heterogeneous FPGA. J. Supercomput. 75(8): 4078-4095 (2019) - [j7]José L. Núñez-Yáñez, Sam Amiri, Mohammad Hosseinabady
, Andrés Rodríguez
, Rafael Asenjo, Angeles G. Navarro
, Darío Suárez Gracia
, Ruben Gran
:
Correction to: Simultaneous multiprocessing in a software-defined heterogeneous FPGA. J. Supercomput. 75(8): 4096-4097 (2019) - [c13]Alejandro Valero
, Darío Suárez Gracia, Ruben Gran Tejero
, Luis M. Ramos, Agustín Navarro-Torres
, Adolfo Muñoz, Joaquín Ezpeleta, José Luis Briz, Ana C. Murillo
, Eduardo Montijano, Javier Resano
, María Villarroya-Gaudó, Jesús Alastruey-Benedé
, Enrique F. Torres, Pedro Álvarez, Pablo Ibáñez
, Víctor Viñals:
Exposing Abstraction-Level Interactions with a Parallel Ray Tracer. WCAE@ISCA 2019: 5:1-5:8 - 2018
- [c12]Maria Angelica Davila Guzman, Ruben Gran Tejero
, María Villarroya-Gaudó, Darío Suárez Gracia
:
Towards the Inclusion of FPGAs on Commodity Heterogeneous Systems. HPCS 2018: 554-556 - [i2]José L. Núñez-Yáñez, Mohammad Hosseinabady, Moslem Amiri, Andrés Rodríguez, Rafael Asenjo, Angeles G. Navarro, Ruben Gran Tejero, Darío Suárez Gracia:
Parallelizing Workload Execution in Embedded and High-Performance Heterogeneous Systems. CoRR abs/1802.03316 (2018) - [i1]Alexandra Ferreron, Jesús Alastruey-Benedé, Darío Suárez Gracia, Ulya R. Karpuzcu:
AISC: Approximate Instruction Set Computer. CoRR abs/1803.06955 (2018) - 2017
- [c11]Tushar Kumar, Aravind Natarajan, Wenjia Ruan, Mario Badr, Darío Suárez Gracia
, Calin Cascaval
:
Abstract Representation of Shared Data for Heterogeneous Computing. LCPC 2017: 145-162 - [c10]José L. Núñez-Yáñez
, Mohammad Hosseinabady
, Andrés Rodríguez
, Rafael Asenjo, Angeles G. Navarro
, Ruben Gran Tejero
, Darío Suárez Gracia
:
Simultaneous Multiprocessing on a FPGA+CPU Heterogeneous System-On-Chip. PARCO 2017: 677-686 - [c9]Francisco Candel, Alejandro Valero
, Salvador Petit
, Darío Suárez Gracia
, Julio Sahuquillo:
Exploiting Data Compression to Mitigate Aging in GPU Register Files. SBAC-PAD 2017: 57-64 - 2016
- [j6]Marta Ortín-Obón
, Darío Suárez Gracia
, María Villarroya-Gaudó, Cruz Izu
, Víctor Viñals
:
Reactive circuits: Dynamic construction of circuits for reactive traffic in homogeneous CMPs. J. Parallel Distributed Comput. 95: 57-68 (2016) - [j5]Marta Ortín-Obón
, Darío Suárez Gracia
, María Villarroya-Gaudó, Cruz Izu
, Víctor Viñals Yúfera
:
Analysis of network-on-chip topologies for cost-efficient chip multiprocessors. Microprocess. Microsystems 42: 24-36 (2016) - [j4]Alexandra Ferrerón-Labari
, Darío Suárez Gracia
, Jesús Alastruey-Benedé
, Teresa Monreal Arnal
, Pablo Ibáñez
:
Concertina: Squeezing in Cache Content to Operate at Near-Threshold Voltage. IEEE Trans. Computers 65(3): 755-769 (2016) - 2015
- [j3]Calin Cascaval
, Pablo Montesinos-Ortego, Behnam Robatmili, Darío Suárez Gracia
:
Concurrency in Mobile Browser Engines. IEEE Pervasive Comput. 14(3): 14-19 (2015) - 2014
- [j2]Darío Suárez Gracia, Alexandra Ferrerón-Labari, Luis Montesano Del Campo, Teresa Monreal Arnal, Víctor Viñals Yúfera
:
Revisiting LP-NUCA Energy Consumption: Cache Access Policies and Adaptive Block Dropping. ACM Trans. Archit. Code Optim. 11(2): 19:1-19:26 (2014) - [c8]Marta Ortín, Darío Suárez Gracia, María Villarroya-Gaudó, Cruz Izu, Víctor Viñals:
Dynamic construction of circuits for reactive traffic in homogeneous CMPs. DATE 2014: 1-4 - [c7]Alexandra Ferrerón-Labari, Darío Suárez Gracia
, Jesús Alastruey-Benedé
, Teresa Monreal Arnal
, Víctor Viñals
:
Block Disabling Characterization and Improvements in CMPs Operating at Ultra-low Voltages. SBAC-PAD 2014: 238-245 - 2013
- [c6]Alexandra Ferrerón-Labari, Marta Ortín-Obón
, Darío Suárez Gracia
, Jesús Alastruey-Benedé
, Víctor Viñals Yúfera
:
Shrinking L1 Instruction Caches to Improve Energy-Delay in SMT Embedded Processors. ARCS 2013: 256-267 - [c5]Marta Ortín
, Alexandra Ferreron, Jorge Albericio, Darío Suárez Gracia
, María Villarroya-Gaudó, Cruz Izu
, Víctor Viñals
:
Characterization and cost-efficient selection of NoC topologies for general purpose CMPs. INA-OCMC@HiPEAC 2013: 21-24 - 2012
- [j1]Darío Suárez Gracia
, Giorgos Dimitrakopoulos
, Teresa Monreal Arnal, Manolis Katevenis, Víctor Viñals Yúfera
:
LP-NUCA: Networks-in-Cache for High-Performance Low-Power Embedded Processors. IEEE Trans. Very Large Scale Integr. Syst. 20(8): 1510-1523 (2012) - [c4]Adrian Sampson
, Calin Cascaval
, Luis Ceze, Pablo Montesinos, Darío Suárez Gracia
:
Automatic discovery of performance and energy pitfalls in HTML and CSS. IISWC 2012: 82-83
2000 – 2009
- 2009
- [c3]Darío Suárez Gracia, Teresa Monreal, Fernando Vallejo, Ramón Beivide, Víctor Viñals:
Light NUCA: A proposal for bridging the inter-cache latency gap. DATE 2009: 530-535 - [c2]Abdullah Muzahid, Darío Suárez Gracia
, Shanxiang Qi, Josep Torrellas:
SigRace: signature-based data race detection. ISCA 2009: 337-348 - 2007
- [c1]Alicia Asín Pérez, Darío Suárez Gracia
, Víctor Viñals Yúfera:
A proposal to introduce power and energy notions in computer architecture laboratories. WCAE 2007: 52-57
Coauthor Index
aka: Maria Angélica Dávila-Guzmán
aka: Ruben Gran
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last updated on 2024-07-15 01:02 CEST by the dblp team
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