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ORCIDJesús Alastruey-Benedé
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- affiliation: Universidad de Zaragoza, Spain
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2020 – today
- 2024
[j9]Lorién López-Villellas
, Rubén Langarita-Benítez, Asaf Badouh, Víctor Soria Pardos, Quim Aguado-Puig, Guillem López-Paradís, Max Doblas, Javier Setoain, Chulho Kim, Makoto Ono, Adrià Armejach, Santiago Marco-Sola, Jesús Alastruey-Benedé, Pablo Ibáñez, Miquel Moretó:
GenArchBench: A genomics benchmark suite for arm HPC processors. Future Gener. Comput. Syst. 157: 313-329 (2024)- 2023
- [j8]Lorién López-Villellas, Carl Christian Kjelgaard Mikkelsen, Juan José Galano-Frutos, Santiago Marco-Sola, Jesús Alastruey-Benedé, Pablo Ibáñez, Miquel Moretó, Javier Sancho, Pablo García-Risueño:
Accurate and efficient constrained molecular dynamics of polymers using Newton's method and special purpose code. Comput. Phys. Commun. 288: 108742 (2023) - [j7]Rubén Langarita, Adrià Armejach, Pablo Ibáñez, Jesús Alastruey-Benedé, Miquel Moretó:
Porting and Optimizing BWA-MEM2 Using the Fujitsu A64FX Processor. IEEE ACM Trans. Comput. Biol. Bioinform. 20(5): 3139-3153 (2023) - [j6]Agustín Navarro-Torres, Jesús Alastruey-Benedé, Pablo Ibáñez, Víctor Viñals Yúfera:
BALANCER: bandwidth allocation and cache partitioning for multicore processors. J. Supercomput. 79(9): 10252-10276 (2023) - [c12]Lorién López-Villellas, Esteve Pineda-Sánchez, Asaf Badouh, Santiago Marco-Sola, Pablo Ibáñez, Jesús Alastruey-Benedé, Miquel Moretó:
RISC-V for Genome Data Analysis: Opportunities and Challenges. DCIS 2023: 1-6 - 2022
- [j5]Rubén Langarita, Adrià Armejach, Javier Setoain, Pablo Ibáñez-Marín, Jesús Alastruey-Benedé, Miquel Moretó:
Compressed Sparse FM-Index: Fast Sequence Alignment Using Large K-Steps. IEEE ACM Trans. Comput. Biol. Bioinform. 19(1): 355-368 (2022) - [c11]Agustín Navarro-Torres, Biswabandan Panda, Jesús Alastruey-Benedé, Pablo Ibáñez, Víctor Viñals Yúfera, Alberto Ros:
Berti: an Accurate Local-Delta Data Prefetcher. MICRO 2022: 975-991 - 2021
- [c10]Agustín Navarro-Torres, Jesús Alastruey-Benedé, Pablo Ibáñez-Marín, Maria Carpen-Amarie:
Synchronization Strategies on Many-Core SMT Systems. SBAC-PAD 2021: 54-63 - 2020
- [j4]Jose Manuel Herruzo, Sonia González-Navarro, Pablo Ibáñez-Marín, Víctor Viñals Yúfera, Jesús Alastruey-Benedé, Oscar G. Plata:
Accelerating Sequence Alignments Based on FM-Index Using the Intel KNL Processor. IEEE ACM Trans. Comput. Biol. Bioinform. 17(4): 1093-1104 (2020) - [c9]Enrique Torres-Sánchez, Jesús Alastruey-Benedé, Enrique F. Torres Moreno:
Developing an AI IoT application with open software on a RISC-V SoC. DCIS 2020: 1-6
2010 – 2019
- 2019
- [j3]Alexandra Ferrerón-Labari, Jesús Alastruey-Benedé, Darío Suárez Gracia, Teresa Monreal Arnal, Pablo Ibáñez-Marín, Víctor Viñals Yúfera:
A fault-tolerant last level cache for CMPs operating at ultra-low voltage. J. Parallel Distributed Comput. 125: 31-44 (2019) - [c8]Jose Manuel Herruzo, Sonia González-Navarro, Pablo Ibáñez, Víctor Viñals, Jesús Alastruey-Benedé, Oscar G. Plata:
Boosting Backward Search Throughput for FM-Index Using a Compressed Encoding. DCC 2019: 577 - [c7]Alejandro Valero, Darío Suárez Gracia, Ruben Gran Tejero, Luis M. Ramos, Agustín Navarro-Torres, Adolfo Muñoz, Joaquín Ezpeleta, José Luis Briz, Ana C. Murillo, Eduardo Montijano, Javier Resano, María Villarroya-Gaudó, Jesús Alastruey-Benedé, Enrique F. Torres, Pedro Álvarez, Pablo Ibáñez, Víctor Viñals:
Exposing Abstraction-Level Interactions with a Parallel Ray Tracer. WCAE@ISCA 2019: 5:1-5:8 - 2018
- [i1]Alexandra Ferreron, Jesús Alastruey-Benedé, Darío Suárez Gracia, Ulya R. Karpuzcu:
AISC: Approximate Instruction Set Computer. CoRR abs/1803.06955 (2018) - 2016
- [j2]Alexandra Ferrerón-Labari, Darío Suárez Gracia, Jesús Alastruey-Benedé, Teresa Monreal Arnal, Pablo Ibáñez:
Concertina: Squeezing in Cache Content to Operate at Near-Threshold Voltage. IEEE Trans. Computers 65(3): 755-769 (2016) - 2015
- [c6]Carl Christian Kjelgaard Mikkelsen, Jesús Alastruey-Benedé, Pablo Ibáñez-Marín, Pablo García-Risueño:
Accelerating Sparse Arithmetic in the Context of Newton's Method for Small Molecules with Bond Constraints. PPAM (1) 2015: 160-171 - 2014
- [c5]Alexandra Ferrerón-Labari, Darío Suárez Gracia, Jesús Alastruey-Benedé, Teresa Monreal Arnal, Víctor Viñals:
Block Disabling Characterization and Improvements in CMPs Operating at Ultra-low Voltages. SBAC-PAD 2014: 238-245 - 2013
- [c4]Alexandra Ferrerón-Labari, Marta Ortín-Obón, Darío Suárez Gracia, Jesús Alastruey-Benedé, Víctor Viñals Yúfera:
Shrinking L1 Instruction Caches to Improve Energy-Delay in SMT Embedded Processors. ARCS 2013: 256-267
2000 – 2009
- 2008
- [c3]Jesús Alastruey, Teresa Monreal, Francisco J. Cazorla, Víctor Viñals, Mateo Valero:
Selection of the Register File Size and the Resource Allocation Policy on SMT Processors. SBAC-PAD 2008: 63-70 - 2007
- [c2]Jesús Alastruey, Teresa Monreal, Víctor Viñals, Mateo Valero:
Microarchitectural Support for Speculative Register Renaming. IPDPS 2007: 1-10 - 2006
- [j1]Jesús Alastruey, José Luis Briz, Pablo Ibáñez, Víctor Viñals:
Software Demand, Hardware Supply. IEEE Micro 26(4): 72-82 (2006) - [c1]Jesús Alastruey, Teresa Monreal, Víctor Viñals, Mateo Valero:
Speculative early register release. Conf. Computing Frontiers 2006: 291-302
Coauthor Index
aka: Pablo Ibáñez-Marín
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