5. IPPS 1991:
Anaheim,
California,
USA
V. K. Prasanna Kumar (Ed.):
The Fifth International Parallel Processing Symposium,
Proceedings,
Anaheim,
California,
USA,
April 30 - May 2,
1991. IEEE Computer Society,
1991,
ISBN 0-8186-9167-0
Algorithms
- David Nassimi, Yuh-Dong Tsai:
Efficient Implementations of a Class of ± 2b Parallel Computations on a SIMD Hypercube.
2-9
- J. Andrew Holey, Oscar H. Ibarra:
Triangulation in a Plane and 3-D Convex Hull on Mesh-Connected Arrays and Hypercubes.
10-17
- Dan C. Marinescu, John R. Rice:
The Effects of Communication Latency Upon Synchronization and Dynamic Load Balance on a Hypercube.
18-25
- Dionisios I. Reisis:
Improved Graph Computations on the Reconfigurable Mesh.
26-29
- Linda F. Wilson, Mario J. Gonzalez:
Design Guidelines for Parallel Algorithms Using Continuous Job Profiles.
30-36
- I-Ling Yen, Farokh B. Bastani, Ernst L. Leiss:
An Inherently Fault Tolerant Sorting Algorithm.
37-42
- Anupam Basu, S. Srinivas, Kamlesh G. Kumar, Arogyaswami Paulraj, Lalit M. Patnaik:
Performance Analysis of Algorithms on a Message Passing Multiprocessor.
43-50
- M. A. Sridhar, Shri K. Goyal:
Routing Algorithms in Interval and Circular-Arc Networks.
51-55
- Alan C. Shaw:
Deterministic Timing Schema for Parallel Programs.
56-63
- Eva Leung, Xiaobo Li:
Generalized Formulation and Hypercube Algorithms for Relaxation Labeling.
64-69
- Jeffrey C. Becker, Charles U. Martel, Arvin Park:
General Asynchrony Is Not Expensive for PRAMs.
70-75
- Oscar H. Ibarra, Myung Hee Kim:
Fast Parallel Algorithms for Solving Triangular Systems of Linear Equations on the Hypercube.
76-83
- Hillel Gazit:
Optimal EREW Parallel Algorithms for Connectivity, Ear Decomposition and st-Numbering of Planar Graphs.
84-91
- Vineet Singh, Vipin Kumar, Gul Agha, Chris Tomlinson:
Scalability of Parallel Sorting on Mesh Multicomputers.
92-101
- Gerard J. M. Smit, Paul J. M. Havinga, Pierre G. Jansen:
An Algorithm for Generating Node Disjoint Routes in Kautz Digraphs.
102-107
- Marios M. Polycarpou, Petros A. Ioannou:
A Neural-Type Parallel Algorithm for Fast Matrix Inversion.
108-113
- Zhaofang Wen:
Parallel Multiple Search.
114-119
- Si-Qing Zheng:
SIMD Data Communication Algorithms for Multiply Twisted Hypercubes.
120-125
- Sushil K. Prasad, Narsingh Deo:
Two EREW Algorithms for Parentheses Matching.
126-131
- Calvin Ching-Yuen Chen, Sajal K. Das:
A Cost-Optimal Parallel Algorithm for the Parentheses Matching Problem on an EREW PRAM.
132-137
- Judith O. Berkey, Pearl Y. Wang:
A Parallel Approximation Algorithm for Solving One-Dimensional Bin Packing Problems.
138-143
- Venkata K. Prabhala, Naveed A. Sherwani:
Fully Normal Algorithms for Incomplete Hypercubes.
144-150
- Ravi Varadarajan, Bhavani Ravichandran:
Refining Algorithm Mappings for Linear Systolic Arrays.
151-154
- Roger D. Chamberlain, Mark A. Franklin:
Analysis of Parallel Mixed-Mode Simulation Algorithms.
155-160
- S. N. Gupta, Mohammad Zubair, C. E. Grosch:
Implementation of an Oversize Neural Network on DAP-510.
161-164
- Sajal K. Das, Cui-Qing Yang:
Performance of Parallel Spanning Tree Algorithms on Linear Arrays of Transputers and Unix Systems.
165-168
Applications
- Ju-wook Jang, K. Wojtek Przytula:
Trade-Offs In Mapping FFT Computations onto Fixed Size Mesh Processor Array.
170-177
- Scott T. Toborg, Kai Hwang:
Parallel Vision Integration on the AMT Distributed Array Processor.
178-185
- Lakshman Prasad, S. Sitharama Iyengar, Rangasami L. Kashyap, R. N. Madan:
Functional Characterization of Sensor Integration in Distributed Sensor Networks.
186-193
- James J. Kistler, Jon A. Webb:
Connected Components with Split and Merge.
194-201
- Selim Akyokus, P. Bruce Berra:
Otpical Content Addressable Memories for Data/Knowledge Base Processing.
202-207
- Jing-Fu Fu Jenq, Sartaj Sahni:
Reconfigurable Mesh Algorithms for Image Shrinking, Expanding, Clustering, and Template Matching.
208-215
- David B. Shu, J. Greg Nash, K. Kim:
Parallel Implementation of Image Understanding Tasks on Gated-Connection Networks.
216-223
- Arthur Abnous, Nader Bagherzadeh:
Special Features of a VLIW Architecture.
224-227
- Zhen-Ping Lo, Behnam Bavarian:
A Neural Algorithm for Variable Thresholding of Images.
228-233
- Ahmed Louri:
Design of an Optical Content-Addressable Parallel Processor with Applications to Fast Searching and Information Retrieval.
234-239
- Peter Wohl, Thomas W. Christopher:
A Parallel Processing Approach to Incremental Conceptual Clustering.
240-245
- Zhen-Ping Lo, Masahiro Fujita, Behnam Bavarian:
Analysis of Neighborhood Interaction in Kohonen Neural Networks.
246-249
- K. P. Lam, C. J. Su:
On a Binary Relation Inference Network.
250-255
- Steve Kuo, Dan I. Moldovan, Seungho Cha:
MCMR: A Multiple Rule Firing Production System Model.
256-259
- Alok N. Choudhary, Ravi Ponnusamy:
Guided Scheduling Schemes for Image Understanding Tasks for Shared and Distributed Memory Multiprocessors.
260-264
- Soon Myoung Chung:
Optical Database Machine Using Spatial Light Rebroadcasters.
265-268
Architectures
- Ronald F. DeMara, Dan I. Moldovan:
Design of a Clustered Multiprocessor for Real-time Natural Language Understanding.
270-277
- Shuichi Sakai, Yuetsu Kodama, Yoshinori Yamaguchi:
Prototype Implementation of a Highly Parallel Dataflow Machine EM-4.
278-286
- Arun K. Somani, Craig M. Wittenbrink, Robert M. Haralick, Linda G. Shapiro, Jenq-Neng Hwang, Chung-Ho Chen, Robert Johnson, Kenneth Cooper:
Proteus System Architecture and Organization.
287-294
- S. G. Skinner, Peter M. Flanders, A. G. Bale:
Development of a Mixed MIMD-SIMD Architecture Using the AMT DAP.
295-300
- Thomas B. Berg, Howard Jay Siegel:
Instruction Execution Trade-Offs for SIMD vs. MIMD vs. Mixed Mode Parallelism.
301-308
- William Tsun-Yuk Hsu, Pen-Chung Yew:
An Effective Synchronization Network for Large Multiprocessor Systems.
309-317
- Paraskevas Evripidou, Jean-Luc Gaudiot:
Input/Output Operations for Hybrid Data-Flow/Control-Flow Systems.
318-323
- Stein Gjessing, Stein Krogdahl, Ellen Munthe-Kaas:
A Linked List Cache Coherence Protocol: Verifying the Bottom Layer.
324-329
- Zhixi Fang, Mi Lu, Hua Lin:
An Approach to Solve the Cache Thrashing Problem.
330-335
- Kenji Toda, Kenji Nishida, Yoshinobu Uchibori, Shuichi Sakai, Toshio Shimada:
Parallel Multi-Context Architecture with High-Speed Synchronization Mechanism.
336-343
- Graham M. Megson:
Systolic Rank Updating and the Solution of Non-Linear Equations.
344-351
- Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri:
On the Design of Optimal Fault-Tolerant Systolic Array Architecures.
352-357
- Khaled M. Elleithy, Magdy A. Bayoumi:
From Algorithms to Parallel Architectures: A Formal Approach.
358-363
- Amiya Nayak, Nicola Santoro:
Bounds on Performance of VLSI Processor Arrays.
364-370
- S. Erlich, K. Yao:
Systolic Array Architecture for Adaptive Eigenstructure Decomposition of Correlation Matrices.
371-376
- G. M. Chaudhry, J. S. Bedi:
State Variable Model for a Class of Multiprocessor Systems.
377-380
- Joydeep Ghosh, Bipul Agarwal:
Parallel I/O Subsystems for Distributed-Memory Multicomputers.
381-384
- Peter M. Athanas, Harvey F. Silverman:
Amstrong II: A Loosely Coupled Multiprocessor with a Reconfigurable Communications Architecture.
385-388
Networks
- Isaac D. Scherson:
Multidimensional Access Shared Memory Parallel Processing Systems.
390-397
- Kichul Kim, C. S. Raghavendra:
A Simple Algorithm to Route Arbitrary Permuations on 8-Input 5-Stage Shuffle/Exchange Network.
398-403
- Jung-Sing Jwo, S. Lakshmivarahan, Sudarshan K. Dhall:
Characterization of Node Disjoint (Parallel) Path in Star Graphs.
404-409
- Abdou Youssef:
Efficient Randomized Routing on Clos Networks.
410-415
- Ajay K. Gupta, Alfred J. Boals, Naveed A. Sherwani:
On Optimal Embeddings into Incomplete Hypercubes.
416-423
- Sung-Woo Park, Wei Kang Tsai:
Distributed Hierarchical Optimal Routing Using Aggregation/Disaggergation and Decomposition/Composition Techniques.
424-431
- Seshu V. R. Madabhushi, S. Lakshmivarahan, Sudarshan K. Dhall:
A Note on Orthogonal Graphs.
432-437
- Wolfgang K. Giloi, Sergio Montenegro:
Choosing the Interconnect of Distributed Memory Systems by Cost and Blocking Behavior.
438-444
- Adam Dingle, H. Barada:
Optimum Embeddings of End-Around Meshes into Pyramid Networks.
445-451
- Ravi Mittal, Bijendra N. Jain, Rakesh K. Patney:
Link Augmented Binary (LAB)-Tree: Its Structure, Routing and Fault Tolerance Properties.
452-457
- Kemal Efe, Kumar Ramaiyer:
Congestion and Fault Tolerance of Binary Tree Embeddings on Hypercube.
458-463
- W. Worth Kirkman, Donna J. Quammen:
Packed Exponential Connections - A Hierarchy of 2-D Meshes.
464-470
- Enamul Haq:
Cross-Cube: A New Fault Tolerant Hypercube-Based Network.
471-474
- Mokhtar Aboelaze:
Multi-level Hypercube Network.
475-480
- Shyan-Ming Yuan:
A Resilient Decentralized Commit Protocol.
481-486
- Abdelghani Bellaachia, Abdou Youssef:
Greedy Partitioning Strategy for Banyan-Hypercube Networks.
487-490
- Behrooz Parhami:
High-Performance Parallel Pipelined Voting Networks.
491-494
- Tohru Matsunaga, Ikuro Oyaizu, E. Uozumi, T. Hoshiko, Y. Kimura:
Modeling and Performance Analysis for Processor-to-Processor Communications Unit Using a 100 Mb/s Optical Token Ring.
495-498
Software
- Krishna P. Belkhale, Prithviraj Banerjee:
A Scheduling Algorithm for Parallelizable Dependent Tasks.
500-506
- Chiun-Chieh Hsu:
Scheduling and Optimization for Multiprocessor Systems.
507-512
- Juan Li, Leah H. Jamieson:
A System for Algorithm-Architecture Mapping Based on Dependence Graph Matching and Hypergraphs.
513-518
- Sukil Kim, Santosh Pande, Dharma P. Agrawal, Jon Mauney:
A Message Segmentation Technique to Minimize Task Completion Time.
519-524
- Jinwoon Woo, Sartaj Sahni:
Load Balancing on a Hypercube.
525-530
- Albert Chuang-shi Yu, Kwei-Jay Lin:
Scheduling Parallelizable Imprecise Computations on Multiprocessors.
531-536
- C. S. Raghavendra, Suresh Chalasani, Rajendra V. Boppana:
Improved Algorithms for Load Balancing in Circuit-Switched Hypercubes.
537-542
- Laxmikant V. Kalé, Balkrishna Ramkumar:
Implementation of a Parallel Prolog Interpreter on Multiprocessors.
543-548
- Nagaraj Shenoy, U. S. Shukla, Arogyaswami Paulraj:
Design and Evaluation of a High Performance File System for Message Passing Parallel Computers.
549-554
- John W. C. Fu, Janak H. Patel:
Data Prefetching Strategies for Vector Cache Memories.
555-560
- James Arthur Kohl, Thomas L. Casavant:
Use of PARADISE: A Meta-Tool for Visualizing Parallel Systems.
561-567
- John D. Bruner, Hoichi Cheong, Alexander V. Veidenbaum, Pen-Chung Yew:
Chief: A Parallel Simulation Environment for Parallel Systems.
568-575
- Kechang Dai, Wolfgang K. Giloi:
Confining Imperative Languages for Parallel Processing.
576-581
- Catherine Mongenet, Philippe Clauss, Guy-René Perrin:
A Geometrical Coding to Compile Affine Recurrence Equations on Regular Arrays.
582-590
- Alberto Avritzer, Mario Gerla, Jack W. Carlyle:
A Load Sharing Interconnection Network for Hard Real-Time Systems.
591-598
- Dattatraya Kulkarni, Kamlesh G. Kumar, Anupam Basu, Arogyaswami Paulraj:
Loop Partitioning Unimodular Transformations for Distributed Memory Multiprocessors.
599-604
- Pei Ouyang:
Execution of Regular DO Loops on Asynchronous Multiprocessors.
605-610
- Pradeep Kumar Sinha, Kyu Sung Park, Xiaohua Jia, Kentaro Shimizu, Mamoru Maekawa:
Process Migration in the GALAXY Distributed Operating System.
611-618
- Chih-Ping Chu, Doris L. Carver:
An Analysis of Recurrence Relations in Fortran Do-loops for Vector Processing.
619-625
- Alok Srivastava, Sanjay C. Kshetramade:
PRESHAK: A Generic Tool to Implement Application Specific Message-Passing Communication Kernels for Concurrent Machines.
626-629
- Ki-Chang Kim, Alexandru Nicolau:
Parallelizing Tightly Nested Loops.
630-633
- George K. Thiruvathukal, Thomas W. Christopher:
A Simulation of Demand-Driven Dataflow: Translation from Lucid into MDC Language.
634-637
- B. Dehbonei, Christophe Laurent, Nadia Tawbi, R. S. Kulkarni:
PMACS: An Environment for Parallel Programming.
638-641
- Isik Aybay, Mehmet Baray:
An OR-Parallel and Restricted AND-Parallel Nonbacktracking Prolog Execution Model.
642-645
Panel
- Alfred Brenner, Richard F. Freund, R. Stockton Gaines, Rob Kelly, Louis Lome, Richard McAndrew, Alexandru Nicolau, Janak H. Patel, Thomas Probert, John H. Reif, Jorge L. C. Sanz, Howard Jay Siegel, Jon A. Webb:
How Do We Make Parallel Processing a Reality? Bridging the Gap Between Theory and Practice.
648-653
Last update Fri May 25 08:23:19 2012
CET by the DBLP Team — 
Data released under the ODC-BY 1.0 license — See also our legal information page
