Dynamically Reconfigurable Systems 2010

Architectures

• Alexander Thomas, Jürgen Becker:
  Development and Synthesis of Adaptive Multi-grained Reconfigurable Hardware Architecture for Dynamic Function Patterns. 3-24
  
• Tobias G. Noll, Thorsten von Sydow, Bernd Neumann, Jochen Schleifer, Thomas Coenen, Götz Kappen:
  Reconfigurable Components for Application-Specific Processor Architectures. 25-49
  
• Josef Angermeier, Christophe Bobda, Mateusz Majer, Jürgen Teich:
  Erlangen Slot Machine: An FPGA-Based Dynamically Reconfigurable Computing Platform. 51-71
  

Design Methods and Tools - Modeling, Evaluation and Compilation

• Sebastian Lange, Martin Middendorf:
  Models and Algorithms for Hyperreconfigurable Hardware. 75-94
  
• Sven Eisenhardt, Thomas Schweizer, Julio A. de Oliveira Filho, Tommy Kuhn, Wolfgang Rosenstiel:
  Evaluation and Design Methods for Processor-Like Reconfigurable Architectures. 95-116
  
• Andreas Koch:
  Adaptive Computing Systems and Their Design Tools. 117-138
  
• Andreas Schallenberg, Wolfgang Nebel, Andreas Herrholz, Philipp A. Hartmann, Kim Grüttner, Frank Oppenheimer:
  PolyDyn - Object-Oriented Modelling and Synthesis Targeting Dynamically Reconfigurable FPGAs. 139-158
  

Design Methods and Tools - Optimization and Runtime Systems

• Markus Rullmann, Renate Merker:
  Design Methods and Tools for Improved Partial Dynamic Reconfiguration. 161-181
  
• Norma Montealegre, Franz J. Rammig:
  Dynamic Partial Reconfiguration by Means of Algorithmic Skeletons - A Case Study. 183-198
  
• Ali Ahmadinia, Josef Angermeier, Sándor P. Fekete, Tom Kamphans, Dirk Koch, Mateusz Majer, Nils Schweer, Jürgen Teich, Christopher Tessars, Jan van der Veen:
  ReCoNodes - Optimization Methods for Module Scheduling and Placement on Reconfigurable Hardware Devices. 199-221
  
• Christian Haubelt, Dirk Koch, Felix Reimann, Thilo Streichert, Jürgen Teich:
  ReCoNets - Design Methodology for Embedded Systems Consisting of Small Networks of Reconfigurable Nodes and Connections. 223-243
  
• Lars Braun, Tobias Schwalb, Philipp Graf, Michael Hübner, Michael Ullmann, Klaus D. Müller-Glaser, Jürgen Becker:
  Adaptive Runtime System with Intelligent Allocation of Dynamically Reconfigurable Function Model and Optimized Interface Topologies. 245-267
  
• Enno Lübbers, Marco Platzner:
  ReconOS: An Operating System for Dynamically Reconfigurable Hardware. 269-290
  

Applications

• Matthias Alles, Timo Vogt, Christian Brehm, Norbert Wehn:
  FlexiChaP: A Dynamically Reconfigurable ASIP for Channel Decoding for Future Mobile Systems. 293-314
  
• Heiko Hinkelmann, Peter Zipf, Manfred Glesner:
  Dynamically Reconfigurable Systems for Wireless Sensor Networks. 315-334
  
• Carsten Albrecht, Jürgen Foag, Roman Koch, Erik Maehle, Thilo Pionteck:
  DynaCORE - Dynamically Reconfigurable Coprocessor for Network Processors. 335-354
  
• Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf:
  FlexPath NP - Flexible, Dynamically Reconfigurable Processing Paths in Network Processors. 355-374
  
• Christopher Claus, Walter Stechele:
  AutoVision - Reconfigurable Hardware Acceleration for Video-Based Driver Assistance. 375-394
  
• Marc Stöttinger, Felix Madlener, Sorin A. Huss:
  Procedures for Securing ECC Implementations Against Differential Power Analysis Using Reconfigurable Architectures. 395-415
  
• Roland Kasper, Steffen Toscher:
  Reconfigurable Controllers - A Mechatronic Systems Approach. 417-436
  

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