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Publication search results
found 35 matches
- 2005
- Saurabh N. Adya, Igor L. Markov:
Combinatorial techniques for mixed-size placement. ACM Trans. Design Autom. Electr. Syst. 10(1): 58-90 (2005) - Ahmad A. Al-Yamani, Edward J. McCluskey:
Test chip experimental results on high-level structural test. ACM Trans. Design Autom. Electr. Syst. 10(4): 690-701 (2005) - Péter Arató, Zoltán Ádám Mann, András Orbán:
Algorithmic aspects of hardware/software partitioning. ACM Trans. Design Autom. Electr. Syst. 10(1): 136-156 (2005) - Ansuman Banerjee, Pallab Dasgupta:
The open family of temporal logics: Annotating temporal operators with input constraints. ACM Trans. Design Autom. Electr. Syst. 10(3): 492-522 (2005) - Soumendu Bhattacharya, Abhijit Chatterjee:
Optimized wafer-probe and assembled package test design for analog circuits. ACM Trans. Design Autom. Electr. Syst. 10(2): 303-329 (2005) - Aiqun Cao, Naran Sirisantana, Cheng-Kok Koh, Kaushik Roy:
Synthesis of skewed logic circuits. ACM Trans. Design Autom. Electr. Syst. 10(2): 205-228 (2005) - Noureddine Chabini, El Mostapha Aboulhamid, Ismaïl Chabini, Yvon Savaria:
Scheduling and optimal register placement for synchronous circuits derived using software pipelining techniques. ACM Trans. Design Autom. Electr. Syst. 10(2): 187-204 (2005) - Calin Ciordas, Twan Basten, Andrei Radulescu, Kees Goossens, Jef L. van Meerbergen:
An event-based monitoring service for networks on chip. ACM Trans. Design Autom. Electr. Syst. 10(4): 702-723 (2005) - Jason Cong, Hui Huang, Xin Yuan:
Technology mapping and architecture evalution for k/m-macrocell-based FPGAs. ACM Trans. Design Autom. Electr. Syst. 10(1): 3-23 (2005) - Jason Cong, Joseph R. Shinnerl, Min Xie, Tim Kong, Xin Yuan:
Large-scale circuit placement. ACM Trans. Design Autom. Electr. Syst. 10(2): 389-430 (2005) - Azadeh Davoodi, Ankur Srivastava:
Voltage scheduling under unpredictabilities: a risk management paradigm. ACM Trans. Design Autom. Electr. Syst. 10(2): 354-368 (2005) - Nikil D. Dutt:
Editorial. ACM Trans. Design Autom. Electr. Syst. 10(1): 1-2 (2005) - Tao Feng, Li-C. Wang, Kwang-Ting Cheng, Chih-Chan Lin:
Using 2-domain partitioned OBDD data structure in an enhanced symbolic simulator. ACM Trans. Design Autom. Electr. Syst. 10(4): 627-650 (2005) - Masahiro Fujita:
Equivalence checking between behavioral and RTL descriptions with virtual controllers and datapaths. ACM Trans. Design Autom. Electr. Syst. 10(4): 610-626 (2005) - Puneet Gupta, Andrew B. Kahng, Stefanus Mantik:
Routing-aware scan chain ordering. ACM Trans. Design Autom. Electr. Syst. 10(3): 546-560 (2005) - Ian G. Harris:
Introduction. ACM Trans. Design Autom. Electr. Syst. 10(4): 587-588 (2005) - Jason T. Higgins, Mark D. Aagaard:
Simplifying the design and automating the verification of pipelines with structural hazards. ACM Trans. Design Autom. Electr. Syst. 10(4): 651-672 (2005) - Gene Eu Jan, Ki-Yin Chang, Su Gao, Ian Parberry:
A 4-geometry maze router and its application on multiterminal nets. ACM Trans. Design Autom. Electr. Syst. 10(1): 116-135 (2005) - Ismail Kadayif, Anand Sivasubramaniam, Mahmut T. Kandemir, Gokul B. Kandiraju, Guangyu Chen:
Optimizing instruction TLB energy using software and hardware techniques. ACM Trans. Design Autom. Electr. Syst. 10(2): 229-257 (2005) - Dimitrios Kagaris:
A unified method for phase shifter computation. ACM Trans. Design Autom. Electr. Syst. 10(1): 157-167 (2005) - Chi-Chou Kao, Yen-Tai Lai:
An efficient algorithm for finding the minimal-area FPGA technology mapping. ACM Trans. Design Autom. Electr. Syst. 10(1): 168-186 (2005) - Farinaz Koushanfar, Inki Hong, Miodrag Potkonjak:
Behavioral synthesis techniques for intellectual property protection. ACM Trans. Design Autom. Electr. Syst. 10(3): 523-545 (2005) - Jaehwan John Lee, Vincent John Mooney III:
An o(min(m, n)) parallel deadlock detection algorithm. ACM Trans. Design Autom. Electr. Syst. 10(3): 573-586 (2005) - Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, Paul J. Thadikaran:
Efficient techniques for transition testing. ACM Trans. Design Autom. Electr. Syst. 10(2): 258-278 (2005) - Seda Ogrenci Memik, Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh:
A scheduling algorithm for optimization and early planning in high-level synthesis. ACM Trans. Design Autom. Electr. Syst. 10(1): 33-57 (2005) - Saraju P. Mohanty, N. Ranganathan:
Energy-efficient datapath scheduling using multiple voltages and dynamic clocking. ACM Trans. Design Autom. Electr. Syst. 10(2): 330-353 (2005) - Mehrdad Nourani, Mohammad H. Tehranipour:
RL-huffman encoding for test compression and power reduction in scan applications. ACM Trans. Design Autom. Electr. Syst. 10(1): 91-115 (2005) - JoAnn M. Paul, Donald E. Thomas, Andrew S. Cassidy:
High-level modeling and simulation of single-chip programmable heterogeneous multiprocessors. ACM Trans. Design Autom. Electr. Syst. 10(3): 431-461 (2005) - Kara K. W. Poon, Steven J. E. Wilton, Andy Yan:
A detailed power model for field-programmable gate arrays. ACM Trans. Design Autom. Electr. Syst. 10(2): 279-302 (2005) - Arnab Roy, Subrat Kumar Panda, Rajeev Kumar, P. P. Chakrabarti:
A framework for systematic validation and debugging of pipeline simulators. ACM Trans. Design Autom. Electr. Syst. 10(3): 462-491 (2005)
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