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Publication search results
found 87 matches
- 1996
- Christoph Grimm, Klaus Waldschmidt:
KIR - a graph-based model for description of mixed analog/digital systems. EURO-DAC 1996: 568-573 - Mohamed Abid, Adel Changuel, Ahmed Amine Jerraya:
Exploration of hardware/software design space through a codesign of robot arm controller. EURO-DAC 1996: 42-47 - Tobias H. Abthoff, Frank M. Johannes:
TINA: analog placement using enumerative techniques capable of optimizing both area and net length. EURO-DAC 1996: 398-403 - Mona M. Ahmed, Hani F. Ragaie, Hisham Haddara:
A hierarchical approach to analog behavioral modeling of neural networks using HDL-A. EURO-DAC 1996: 2-9 - Bogdan G. Arsintescu, Sorin A. Spânoche:
Global stacking for analog circuits. EURO-DAC 1996: 392-397 - Wendell C. Baker, A. Richard Newton:
The maximal VHDL subset with a cycle-level abstraction. EURO-DAC 1996: 470-475 - Smita Bakshi, Daniel D. Gajski, Hsiao-Ping Juan:
Component selection in resource shared and pipelined DSP applications. EURO-DAC 1996: 370-375 - Ekambaram Balaji, Prabhu Krishnamurthy:
Modeling ASIC memories in VHDL. EURO-DAC 1996: 502-508 - Peter A. Beerel, Wei-Chun Chou, Kenneth Y. Yun:
A heuristic covering technique for optimizing average-case delay in the technology mapping of asynchronous burst-mode circuits. EURO-DAC 1996: 284-289 - Armin Bender:
MILP based task mapping for heterogeneous multiprocessor systems. EURO-DAC 1996: 190-197 - Krzysztof Bilinski, Erik L. Dagless, Jaroslaw Mirkowski:
Synchronous parallel controller synthesis from behavioural multiple-process VHDL description. EURO-DAC 1996: 516-521 - Jürgen Bortolazzi, Thomas Hirth, Thomas Raith:
Specification and design of electronic control units. EURO-DAC 1996: 36-41 - Ulrich Bretthauer, Ernst-Helmut Horneber:
BRASIL: the Braunschweig mixed-mode-simulator for integrated circuits. EURO-DAC 1996: 10-14 - Peter T. Breuer, Carlos Delgado Kloos, Natividad Martínez Madrid, Luis Sánchez, Andrés Marín:
A refinement calculus for VHDL. EURO-DAC 1996: 482-487 - J. Bullmann, Wolfgang Rosenstiel, Endric Schubert, Udo Kebschull:
Library based technology mapping using multiple domain representations. EURO-DAC 1996: 146-150 - Stephanus Büttgenbach:
Spotlights on recent developments in microsystem technology. EURO-DAC 1996: 274-279 - Gianpiero Cabodi, Paolo Camurati, Luciano Lavagno, Stefano Quer, Robert K. Brayton, Ellen Sentovich:
Incremental re-encoding for symbolic traversal of product machines. EURO-DAC 1996: 158-163 - Adel Changuel, Ahmed Amine Jerraya, Robin Rolland:
Design of an adaptive motors controller based on fuzzy logic using behavioral synthesis. EURO-DAC 1996: 48-52 - Ernst Christen, Kenneth Bakalar:
VHDL 1076.1 - analog and mixed signal extensions to VHDL. EURO-DAC 1996: 556-561 - Andrew Crews, Forrest Brewer:
Controller optimization for protocol intensive applications. EURO-DAC 1996: 140-145 - Francesco Curatelli, Marco Chirico, Leonardo Mangeruca:
Specification and management of timing constraints in behavioral VHDL. EURO-DAC 1996: 522-527 - Rhodri M. Davies, John V. Woods:
Timing verification for asynchronous design. EURO-DAC 1996: 78-83 - Vladimir B. Dmitriev-Zdorov:
Generalized coupling as a way to improve the convergence in relaxation-based solvers. EURO-DAC 1996: 15-20 - Heinz-Josef Eikerling, Wolfgang Rosenstiel:
Automatic structuring and optimization of hierarchical designs. EURO-DAC 1996: 134-139 - Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli:
Hardware/software partitioning of VHDL system specifications. EURO-DAC 1996: 434-439 - Luis Entrena, Emilio Olías, Javier Uceda, José Alberto Espejo:
Timing optimization by an improved redundancy addition and removal technique. EURO-DAC 1996: 342-347 - Henrik Esbensen, Ernest S. Kuh:
EXPLORER: an interactive floorplanner for design space exploration. EURO-DAC 1996: 356-361 - D. Gareth Evans, Peter N. Green, Derrick Morris:
An integrated approach to engineering computer systems. EURO-DAC 1996: 264-269 - Konrad Feyerabend, Rainer Schlör:
Hardware synthesis from requirement specifications. EURO-DAC 1996: 496-501 - Sabih H. Gerez, Erwin G. Woutersen:
Assignment of storage values to sequential read-write memories. EURO-DAC 1996: 302-307
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retrieved on 2024-05-10 08:48 CEST from data curated by the dblp team
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