• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 17 matches

• 2001
• 
  Frederic T. Chong, Christoforos E. Kozyrakis, Mark Oskin:
  Intelligent Memory Systems, Second International Workshop, IMS 2000, Cambridge, MA, USA, November 12, 2000, Revised Papers. Lecture Notes in Computer Science 2107, Springer 2001, ISBN 3-540-42328-1 [contents]
• 2000
• 
  Robert Cooksey, Dennis Colarelli, Dirk Grunwald:
  Content-Based Prefetching: Initial Results. Intelligent Memory Systems 2000: 33-55
• 
  Jeff La Coss:
  The DIVA Emulator: Accelerating Architecture Studies for PIM-Based Systems. Intelligent Memory Systems 2000: 179-182
• 
  Peter Grun, Nikil D. Dutt, Alexandru Nicolau:
  Aggressive Memory-Aware Compilation. Intelligent Memory Systems 2000: 147-151
• 
  Mary W. Hall, Craig S. Steele:
  Memory Management in a PIM-Based Architecture. Intelligent Memory Systems 2000: 104-121
• 
  Tsung-Chuan Huang, Slo-Li Chu:
  SAGE: A New Analysis and Optimization System for FlexRAM Architecture. Intelligent Memory Systems 2000: 160-168
• 
  Michael C. Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas:
  Energy/Performance Design of Memory Hierarchies for Processor-in-Memory Chips. Intelligent Memory Systems 2000: 152-159
• 
  Koji Inoue, Koji Kai, Kazuaki J. Murakami:
  Performance/Energy Efficiency of Variable Line-Size Caches for Intelligent Memory Systems. Intelligent Memory Systems 2000: 169-178
• 
  David Judd, Katherine A. Yelick, Christoforos E. Kozyrakis, David R. Martin, David A. Patterson:
  Exploiting On-Chip Memory Bandwidth in the VIRAM Compiler. Intelligent Memory Systems 2000: 122-134
• 
  Csaba Andras Moritz, Matthew I. Frank, Saman P. Amarasinghe:
  FlexCache: A Framework for Flexible Compiler Generated Data Caching. Intelligent Memory Systems 2000: 135-146
• 
  Richard C. Murphy, Peter M. Kogge, Arun Rodrigues:
  The Characterization of Data Intensive Memory Workloads on Distributed PIM Systems. Intelligent Memory Systems 2000: 85-103
• 
  Hiroshi Nakamura, Masaaki Kondo, Taisuke Boku:
  Software Controlled Reconfigurable On-Chip Memory for High Performance Computing. Intelligent Memory Systems 2000: 15-32
• 
  Dan Nicolaescu, Xiaomei Ji, Alexander V. Veidenbaum, Alexandru Nicolau, Rajesh K. Gupta:
  Compiler-Directed Cache Line Size Adaptivity. Intelligent Memory Systems 2000: 183-187
• 
  Junji Ogawa, Mark Horowitz:
  A 64Mbit Mesochronous Hybrid Wave Pipelined Multibank DRAM Macro. Intelligent Memory Systems 2000: 1-14
• 
  Yan Solihin, Jaejin Lee, Josep Torrellas:
  Adaptively Mapping Code in an Intelligent Memory Architecture. Intelligent Memory Systems 2000: 71-84
• 
  Workshop Notes. Intelligent Memory Systems 2000: 188-192
• 
  Lixin Zhang, Venkata K. Pingali, Bharat Chandramouli, John B. Carter:
  Memory System Support for Dynamic Cache Line Assembly. Intelligent Memory Systems 2000: 56-70