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Publication search results
found 61 matches
- 2005
- Hideharu Amano, Shohei Abe, Yohei Hasegawa, Katsuaki Deguchi, Masayasu Suzuki:
Performance and Cost Analysis of Time-Multiplexed Execution on the Dynamically Reconfigurable Processor. FCCM 2005: 315-316 - Michael Attig, John W. Lockwood:
A Framework for Rule Processing in Reconfigurable Network Systems. FCCM 2005: 225-234 - Zachary K. Baker, Viktor K. Prasanna:
Efficient Hardware Data Mining with the Apriori Algorithm on FPGAs. FCCM 2005: 3-12 - Paul Baker, Tim Todman, Henry Styles, Wayne Luk:
Reconfigurable Designs for Radiosity. FCCM 2005: 95-104 - Sudarshan Banerjee, Elaheh Bozorgzadeh, Nikil D. Dutt:
Considering Run-Time Reconfiguration Overhead in Task Graph Transformations for Dynamically Reconfigurable Architectures. FCCM 2005: 273-274 - John Sachs Beeckler, Warren J. Gross:
FPGA Particle Graphics Hardware. FCCM 2005: 85-94 - Christophe Bobda, Mateusz Majer, Ali Ahmadinia, Thomas Haller, André Linarth, Jürgen Teich, Sándor P. Fekete, Jan van der Veen:
The Erlangen Slot Machine: A Highly Flexible FPGA-Based Reconfigurable Platform. FCCM 2005: 319-320 - Christos-Savvas Bouganis, George A. Constantinides, Peter Y. K. Cheung:
A Novel 2D Filter Design Methodology for Heterogeneous Devices. FCCM 2005: 13-22 - Bryan Catanzaro, Brent E. Nelson:
Higher Radix Floating-Point Representations for FPGA-Based Arithmetic. FCCM 2005: 161-170 - Young H. Cho, William H. Mangione-Smith:
Fast Reconfiguring Deep Packet Filter for 1+ Gigabit Network. FCCM 2005: 215-224 - Chuan He, Wei Zhao, Mi Lu:
Time Domain Numerical Simulation for Transient Waves on Reconfigurable Coprocessor Platform. FCCM 2005: 127-136 - Luis E. Cordova, Duncan A. Buell, Sreesa Akella:
The DARPA Dynamic Programming Benchmark on a Reconfigurable Computer. FCCM 2005: 327-328 - José Gabriel F. Coutinho, Jun Jiang, Wayne Luk:
Interleaving Behavioral and Cycle-Accurate Descriptions for Reconfigurable Hardware Compilation. FCCM 2005: 245-254 - Petersen F. Curt, James P. Durbano, Fernando E. Ortiz, John R. Humphrey, Dennis W. Prather:
A General Purpose, Highly Efficient Communication Controller Architecture for Hardware Acceleration Platforms. FCCM 2005: 309-310 - Pedro C. Diniz:
Evaluation of Code Generation Strategies for Scalar Replaced Codes in Fine-Grain Configurable Architectures. FCCM 2005: 73-82 - Apostolos Dollas, Ioannis Ermis, Iosif Koidis, Ioannis Zisis, Christopher Kachris:
An Open TCP/IP Core for Reconfigurable Logic. FCCM 2005: 297-298 - Apostolos Dollas, Dionissios Efstathiou, Georgios Vernardos, Elias Polytarchos, Konstantinos Kazakos:
On Distributed Reconfigurable Systems: Open Problems and Some Initial Solutions. FCCM 2005: 335-336 - Alberto Donato, Fabrizio Ferrandi, Massimo Redaelli, Marco D. Santambrogio, Donatella Sciuto:
Caronte: A Complete Methodology for the Implementation of Partially Dynamically Self-Reconfiguring Systems on FPGA Platforms. FCCM 2005: 321-322 - David Fang, John Teifel, Rajit Manohar:
A High-Performance Asynchronous FPGA: Test Results. FCCM 2005: 271-272 - Shakith Fernando, Yajun Ha:
Design of Networked Reconfigurable Encryption Engine. FCCM 2005: 285-286 - Matthew French, Li Wang, Tyler Anderson, Michael J. Wirthlin:
Post Synthesis Level Power Modeling of FPGAs. FCCM 2005: 281-282 - Wenyin Fu, Katherine Compton:
An Execution Environment for Reconfigurable Computing. FCCM 2005: 149-158 - Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis:
Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems. FCCM 2005: 301-302 - Brian Greskamp, Ron Sass:
A Virtual Machine for Merit-Based Runtime Reconfiguration. FCCM 2005: 287-288 - Yongfeng Gu, Tom Van Court, Douglas DiSabello, Martin C. Herbordt:
Preliminary Report: FPGA Acceleration of Molecular Dynamics Computations. FCCM 2005: 269-270 - Tsuyoshi Hamada, Naohito Nakasato:
Massively Parallel Processors Generator for Reconfigurable System. FCCM 2005: 329-330 - Arash Hariri, Reza Rastegar, Morteza Saheb Zamani, Mohammad Reza Meybodi:
Parallel Hardware Implementation of Cellular Learning Automata Based Evolutionary Computing (CLA-EC) on FPGA. FCCM 2005: 311-314 - Muhammad Z. Hasan, Sotirios G. Ziavras:
FPGA-Based Vector Processing for Solving Sparse Sets of Equations. FCCM 2005: 331-332 - Michael Haselman, Michael J. Beauchamp, Aaron Wood, Scott Hauck, Keith D. Underwood, K. Scott Hemmert:
A Comparison of Floating Point and Logarithmic Number Systems for FPGAs. FCCM 2005: 181-190 - K. Scott Hemmert, Keith D. Underwood:
An Analysis of the Double-Precision Floating-Point FFT on FPGAs. FCCM 2005: 171-180
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