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Publication search results
found 121 matches
- 2007
- Olujide A. Adeniran, Andreas Demosthenous:
A 14-mW, 153.6-MHz clock-rate Δ∑ modulator for WCDMA with 77-dB SFDR using constant resistance CMOS input sampling switch. ESSCIRC 2007: 244-247 - Amit Agarwal, Nilanjan Banerjee, Steven K. Hsu, Ram K. Krishnamurthy, Kaushik Roy:
A 200mV to 1.2V, 4.4MHz to 6.3GHz, 48×42b 1R/1W programmable register file in 65nm CMOS. ESSCIRC 2007: 316-319 - Imran Ahmed, David A. Johns:
An 11-bit 45MS/s pipelined ADC with rapid calibration of DAC errors in a multi-bit pipeline stage. ESSCIRC 2007: 147-150 - Imran Ahmed, David A. Johns:
A high bandwidth power scaleable sub-sampling 10-bit pipelined ADC with embedded sample and hold. ESSCIRC 2007: 159-162 - Martin Anderson, Lars Sundström:
A 312-MHz CT Δ∑ modulator using a SC feedback DAC with reduced peak current. ESSCIRC 2007: 240-243 - Muhammad Anis, Reinhard Tielert:
Low power UWB pulse radio transceiver front-end. ESSCIRC 2007: 131-134 - Florian Bauer, Klaus von Arnim, Christian Pacha, Thomas Schulz, Michael Fulde, Axel Nackaerts, M. Jurczak, Wade Xiong, K. T. San, C. Rinn Cleavelin, Klaus Schruefer, Georg Georgakos, Doris Schmitt-Landsiedel:
Layout options for stability tuning of SRAM cells in multi-gate-FET technologies. ESSCIRC 2007: 392-395 - Thomas Baumann, Jörg Berthold, T. Niedermeier, Tim Schoenauer, J. Dienstuhl, Doris Schmitt-Landsiedel, Christian Pacha:
Performance improvement of embedded low-power microprocessor cores by selective flip flop replacement. ESSCIRC 2007: 308-311 - Marco Berkhout:
Clock jitter in class-D audio power amplifiers. ESSCIRC 2007: 444-447 - Stephan C. Blaakmeer, Eric A. M. Klumperink, Bram Nauta, Domine M. W. Leenaerts:
An inductorless wideband balun-LNA in 65nm CMOS with balanced output. ESSCIRC 2007: 364-367 - Andrea Bonfanti, Carlo Samori, Andrea L. Lacaita:
A multistandard Σ-Δ fractional-N frequency synthesizer for 802.11a/b/g WLAN. ESSCIRC 2007: 480-483 - Tommaso Borghi, Andrea Bonfanti, Guido Zambra, Riccardo Gusmeroli, Andrea L. Lacaita, Alessandro S. Spinelli, Gytis Baranauskas:
An integrated low-noise multichannel system for neural signals amplification. ESSCIRC 2007: 456-459 - Jonathan Borremans, Piet Wambacq, Geert Van der Plas, Yves Rolain, Maarten Kuijk:
A switchable low-area 2.4-and-5 GHz dual-band LNA in digital CMOS. ESSCIRC 2007: 376-379 - Andreia Cathelin, Baudouin Martineau, N. Seller, S. Douyere, Jean Gorisse, Sébastien Pruvost, Christine Raynaud, Frederic Gianesello, Sébastien Montusclat, Sorin P. Voinigescu, Ali M. Niknejad, Didier Belot, Jean-Pierre Schoellkopf:
Design for millimeter-wave applications in silicon technologies. ESSCIRC 2007: 464-471 - Jérémie Chabloz, David Ruffieux, Alexandre Vouilloz, Paola Tortori, Franz Pengg, Claude Müller, Christian C. Enz:
Frequency synthesis for a low-power 2.4 GHz receiver using a BAW oscillator and a relaxation oscillator. ESSCIRC 2007: 492-495 - Hyunsoo Chae, Sangdon Jung, Chulwoo Kim:
A wide-range duty-independent all-digital multiphase clock generator. ESSCIRC 2007: 186-189 - G. Reza Chaji, Arokia Nathan:
A Sub-μA fast-settling current-programmed pixel circuit for AMOLED displays. ESSCIRC 2007: 344-347 - Soumya Chandramouli, Franklin Bien, Hyoungsoo Kim, Edward Gebara, Joy Laskar:
A 10-Gb/sec unclocked current-mode logic (CML) analog decision-feedback equalizer (ADFE) in 0.18-μm CMOS. ESSCIRC 2007: 512-515 - Olivier Charlon, S. Clamagirand, V. Vathulya, C. Hritz, Bassem Fahs, O. Burg, C. Caumont, Philippe Barre, L. Guiraud, E. Chartier, V. Blanchard, Helen Waite, William Redman-White, R. Perkins, D. Brunel, E. Soudee:
A dual-mode zero-IF receiver for dual-band CDMA cellular and GPS. ESSCIRC 2007: 432-435 - Yihui Chen, Qiuting Huang, Thomas Burger:
A 1.2V 200-MS/s 10-bit folding and interpolating ADC in 0.13-μm CMOS. ESSCIRC 2007: 155-158 - Binjie Cheng, Scott Roy, A. Asenov:
The scalability of 8T-SRAM cells under the influence of intrinsic parameter fluctuations. ESSCIRC 2007: 93-96 - Stefano D'Amico, Marcello De Matteis, Andrea Baschirotto, Nicola Ghittori, Andrea Vigna, Piero Malcovati:
A 5nV/√Hz-IRN, 78dB-gain-range, 78dB-DR multi-standard baseband chain for Bluetooth, UMTS and WLAN. ESSCIRC 2007: 440-443 - André DeHon:
Architecture approaching the atomic scale. ESSCIRC 2007: 11-20 - Wim Dehaene, Stefan Cosemans, Anselme Vignon, F. Catthoora, Peter Geens:
Embedded SRAM design in deep deep submicron technologies. ESSCIRC 2007: 384-391 - Inge Diehl, Karsten Hansen, Christian Reckleben:
A mixed-signal readout chip for a 7-cell Si-Drift detector in 0.35-μm BiCMOS technology. ESSCIRC 2007: 296-299 - Daniel Durini, Werner Brockherde, Bedrich J. Hosticka:
MOS-Capacitor based CMOS time-compression photogate pixel for time-of-flight imaging. ESSCIRC 2007: 340-343 - Alexander Flocke, Tobias G. Noll:
Fundamental analysis of resistive nano-crossbars for the use in hybrid Nano/CMOS-memory. ESSCIRC 2007: 328-331 - Peter Fromherz:
Joining microelectronics and microionics: Nerve cells and brain tissue on semiconductor chips. ESSCIRC 2007: 36-45 - Michael Fulde, Abdelkarim Mercha, Cedric Gustin, Bertrand Parvais, Vaidyanathan Subramanian, Klaus von Arnim, Florian Bauer, Klaus Schruefer, Doris Schmitt-Landsiedel, Gerhard Knoblinger:
Analog design challenges and trade-offs using emerging materials and devices. ESSCIRC 2007: 123-126 - Ivano Galdi, Edoardo Bonizzoni, Franco Maloberti, Gabriele Manganaro, Piero Malcovati:
Two-path band-pass Δ∑ modulator with 40-MHz IF 72-dB DR at 1-MHz bandwidth consuming 16 mW. ESSCIRC 2007: 248-251
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