- Ming-Shuan Chen, Yu-Nan Shih, Chen-Lun Lin, Hao-Wei Hung, Jri Lee:
A Fully-Integrated 40-Gb/s Transceiver in 65-nm CMOS Technology. IEEE J. Solid State Circuits 47(3): 627-640 (2012) - Chun-Ying Chen, Jiangfeng Wu, Juo-Jung Hung, Tianwei Li, Wenbo Liu, Wei-Ta Shih:
A 12-Bit 3 GS/s Pipeline ADC With 0.4 mm2 and 500 mW in 40 nm Digital CMOS. IEEE J. Solid State Circuits 47(4): 1013-1021 (2012) - Zhiming Chen, Chun-Cheng Wang, Hsin-Cheng Yao, Payam Heydari:
A BiCMOS W-Band 2×2 Focal-Plane Array With On-Chip Antenna. IEEE J. Solid State Circuits 47(10): 2355-2371 (2012) - E-Hung Chen, Ramy Yousry, Chih-Kong Ken Yang:
Power Optimized ADC-Based Serial Link Receiver. IEEE J. Solid State Circuits 47(4): 938-951 (2012) - Po-Hung Chen, Xin Zhang, Koichi Ishida, Yasuyuki Okuma, Yoshikatsu Ryu, Makoto Takamiya, Takayasu Sakurai:
An 80 mV Startup Dual-Mode Boost Converter by Charge-Pumped Pulse Generator and Threshold Voltage Tuned Oscillator With Hot Carrier Injection. IEEE J. Solid State Circuits 47(11): 2554-2562 (2012) - Pi-Feng Chiu, Meng-Fan Chang, Che-Wei Wu, Ching-Hao Chuang, Shyh-Shyuan Sheu, Yu-Sheng Chen, Ming-Jinn Tsai:
Low Store Energy, Low VDDmin, 8T2R Nonvolatile Latch and SRAM With Vertical-Stacked Resistive Memory (Memristor) Devices for Low Power Mobile Applications. IEEE J. Solid State Circuits 47(6): 1483-1496 (2012) - Youngkil Choi, Wonho Tak, Younghyun Yoon, Jeongjin Roh
, Sunwoo Kwon, Jinseok Koh:
A 0.018% THD+N, 88-dB PSRR PWM Class-D Amplifier for Direct Battery Hookup. IEEE J. Solid State Circuits 47(2): 454-463 (2012) - Sau Siong Chong, Pak Kwong Chan:
Cross Feedforward Cascode Compensation for Low-Power Three-Stage Amplifier With Large Capacitive Load. IEEE J. Solid State Circuits 47(9): 2227-2234 (2012) - Kwen-Siong Chong, Kok-Leong Chang, Bah-Hwee Gwee
, Joseph S. Chang:
Synchronous-Logic and Globally-Asynchronous-Locally-Synchronous (GALS) Acoustic Digital Signal Processors. IEEE J. Solid State Circuits 47(3): 769-780 (2012) - Wen-Shen Chou, Tzu-Chi Huang, Yu-Huei Lee, Yao-Yi Yang, Yi-Ping Su, Ke-Horng Chen
, Chen-Chih Huang, Ying-Hsi Lin, Chao-Cheng Lee, Kuei-Ann Wen, Ying-Chih Hsu, Yung-Chow Peng, Fu-Lung Hsueh:
An Embedded Dynamic Voltage Scaling (DVS) System Through 55 nm Single-Inductor Dual-Output (SIDO) Switching Converter for 12-Bit Video Digital-to-Analog Converter. IEEE J. Solid State Circuits 47(7): 1568-1584 (2012) - Debopriyo Chowdhury, Siva V. Thyagarajan, Lu Ye, Elad Alon, Ali M. Niknejad:
A Fully-Integrated Efficient CMOS Inverse Class-D Power Amplifier for Digital Polar Transmitters. IEEE J. Solid State Circuits 47(5): 1113-1122 (2012) - Ki Chul Chun, Wei Zhang, Pulkit Jain, Chris H. Kim:
A 2T1C Embedded DRAM Macro With No Boosted Supplies Featuring a 7T SRAM Based Repair and a Cell Storage Monitor. IEEE J. Solid State Circuits 47(10): 2517-2526 (2012) - Ki Chul Chun, Pulkit Jain, Tae-Ho Kim, Chris H. Kim:
A 667 MHz Logic-Compatible Embedded DRAM Featuring an Asymmetric 2T Gain Cell for High Speed On-Die Caches. IEEE J. Solid State Circuits 47(2): 547-559 (2012) - Hayun Chung, Hiroki Ishikuro, Tadahiro Kuroda:
A 10-Bit 80-MS/s Decision-Select Successive Approximation TDC in 65-nm CMOS. IEEE J. Solid State Circuits 47(5): 1232-1241 (2012) - Hayun Chung, Andrzej Radecki, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda:
A 0.025-0.45 W 60%-Efficiency Inductive-Coupling Power Transceiver With 5-Bit Dual-Frequency Feedforward Control for Non-Contact Memory Cards. IEEE J. Solid State Circuits 47(10): 2496-2504 (2012) - Sebastien Cliquennois, Achille Donida, Piero Malcovati
, Andrea Baschirotto
, Angelo Nagari:
A 65-nm, 1-A Buck Converter With Multi-Function SAR-ADC-Based CCM/PSK Digital Control Loop. IEEE J. Solid State Circuits 47(7): 1546-1556 (2012) - Matteo Crotti, Ivan Rech
, Massimo Ghioni
:
Four Channel, 40 ps Resolution, Fully Integrated Time-to-Amplitude Converter for Time-Resolved Photon Counting. IEEE J. Solid State Circuits 47(3): 699-708 (2012) - Delong Cui, Bharath Raghavan, Ullas Singh, Anand Vasani, Zhi Chao Huang, Deyi Pi, Mehdi Khanpour, Ali Nazemi, Hassan Maarefi, Wei Zhang, Tamer A. Ali, Nick Huang, Bo Zhang, Afshin Momtaz, Jun Cao:
A Dual-Channel 23-Gbps CMOS Transmitter/Receiver Chipset for 40-Gbps RZ-DQPSK and CS-RZ-DQPSK Optical Transmission. IEEE J. Solid State Circuits 47(12): 3249-3260 (2012) - Fa Foster Dai:
Introduction to the Special Section on the 25th Bipolar/BiCMOS Circuits and Technology Meeting. IEEE J. Solid State Circuits 47(9): 1964-1965 (2012) - Milad Darvishi, Ronan A. R. van der Zee
, Eric A. M. Klumperink, Bram Nauta
:
Widely Tunable 4th Order Switched Gm-C Band-Pass Filter Based on N-Path Filters. IEEE J. Solid State Circuits 47(12): 3105-3119 (2012) - Timothy O. Dickson, Yong Liu, Sergey V. Rylov
, Bing Dang, Cornelia K. Tsang, Paul S. Andry, John F. Bulzacchelli, Herschel A. Ainspan, Xiaoxiong Gu, Lavanya Turlapati, Michael P. Beakes, Benjamin D. Parker, John U. Knickerbocker, Daniel J. Friedman:
An 8x 10-Gb/s Source-Synchronous I/O System Based on High-Density Silicon Carrier Interconnects. IEEE J. Solid State Circuits 47(4): 884-896 (2012) - Yunzhi Dong, Kenneth W. Martin:
A High-Speed Fully-Integrated POF Receiver With Large-Area Photo Detectors in 65 nm CMOS. IEEE J. Solid State Circuits 47(9): 2080-2092 (2012) - Lûtsen Dooper, Marco Berkhout:
A 3.4 W Digital-In Class-D Audio Amplifier in 0.14µm CMOS. IEEE J. Solid State Circuits 47(7): 1524-1534 (2012) - Brian Drost, Mrunmay Talegaonkar, Pavan Kumar Hanumolu:
Analog Filter Design Using Ring Oscillator Integrators. IEEE J. Solid State Circuits 47(12): 3120-3129 (2012) - Qinwen Fan, Johan H. Huijsing, Kofi A. A. Makinwa:
A 21 nV/√ Hz Chopper-Stabilized Multi-Path Current-Feedback Instrumentation Amplifier With 2 µ V Offset. IEEE J. Solid State Circuits 47(2): 464-475 (2012) - Ramin Farjad-Rad, Friedel Gerfers, Michael Brown, Ahmad Tavakoli, David Nguyen, Hossein Sedarat, Ramin Shirani, Hiok-Tiaq Ng:
A 48-Port FCC-Compliant 10GBASE-T Transmitter With Mixed-Mode Adaptive Echo Canceller. IEEE J. Solid State Circuits 47(12): 3261-3272 (2012) - Daniel Fernández
, Luís Martínez-Alvarado, Jordi Madrenas
:
A Translinear, Log-Domain FPAA on Standard CMOS Technology. IEEE J. Solid State Circuits 47(2): 490-503 (2012) - Denis Foley, Pankaj Bansal, Don Cherepacha, Robert Wasmuth, Aswin Gunasekar, Srinivasa Rao Gutta, Ajay Naini:
A Low-Power Integrated x86-64 and Graphics Processor for Mobile Computing Devices. IEEE J. Solid State Circuits 47(1): 220-231 (2012) - Jeffrey Fredenburg, Michael P. Flynn:
A 90-MS/s 11-MHz-Bandwidth 62-dB SNDR Noise-Shaping SAR ADC. IEEE J. Solid State Circuits 47(12): 2898-2904 (2012) - Koichi Fukuda, Yoshihisa Watanabe, Eiichi Makino, Koichi Kawakami, Jumpei Sato, Teruo Takagiwa, Naoaki Kanagawa, Hitoshi Shiga, Naoya Tokiwa, Yoshihiko Shindo, Takeshi Ogawa, Toshiaki Edahiro, Makoto Iwai, Osamu Nagao, Junji Musha, Takatoshi Minamoto, Yuka Furuta, Kosuke Yanagidaira, Yuya Suzuki, Dai Nakamura, Yoshikazu Hosomura, Rieko Tanaka, Hiromitsu Komai, Mai Muramoto, Go Shikata, Ayako Yuminaka, Kiyofumi Sakurai, Manabu Sakai, Hong Ding, Mitsuyuki Watanabe, Yosuke Kato, Toru Miwa, Alex Mak, Masaru Nakamichi, Gertjan Hemink, Dana Lee, Masaaki Higashitani, Brian Murphy, Bo Lei, Yasuhiko Matsunaga, Kiyomi Naruke, Takahiko Hara:
A 151-mm2 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS Technology. IEEE J. Solid State Circuits 47(1): 75-84 (2012)