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ORCIDP. Balasubramanian 0001
Person information
- affiliation: Nanyang Technological University, Singapore
- affiliation (2012 - 2014): Anna University, S. A. Engineering College, Chennai, India
- affiliation (PhD 2010): University of Manchester, School of Computer Science, UK
Other persons with the same name
- P. Balasubramanian — disambiguation page
- P. Balasubramanian 0002 (aka: P. R. Balasubramanian) — Boston University, School of Management, MA, USA
- P. Balasubramanian 0003 — Amrita University, Amrita School of Business, Coimbatore, India (and 1 more)
- P. Balasubramanian 0004
![[0000-0002-3076-3928]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-3076-3928")
(aka: Balasubramanian Palani) — National Institute of Technology, Department of Computer Science and Engineering, Tiruchirappalli, India
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2020 – today
- 2023
[i30]P. Balasubramanian, Douglas L. Maskell:
Fault-Tolerant Design Approach Based on Approximate Computing. CoRR abs/2311.00328 (2023)- 2022
- [j9]Padmanabhan Balasubramanian, Raunaq Nayar, Okkar Min, Douglas L. Maskell:
Approximator: A Software Tool for Automatic Generation of Approximate Arithmetic Circuits. Comput. 11(1): 11 (2022) - 2021
- [j8]Padmanabhan Balasubramanian, Raunaq Nayar, Douglas L. Maskell, Nikos E. Mastorakis:
An Approximate Adder With a Near-Normal Error Distribution: Design, Error Analysis and Practical Application. IEEE Access 9: 4518-4530 (2021) - [c17]Padmanabhan Balasubramanian, Raunaq Nayar, Douglas L. Maskell:
An Approximate Adder with Reduced Error and Optimized Design Metrics. APCCAS 2021: 21-24 - [c16]Padmanabhan Balasubramanian, Anna Bernasconi, Valentina Ciriani, Tiziano Villa:
A Boolean Heuristic for Disjoint SOP Synthesis. DSD 2021: 62-68 - [c15]Raunaq Nayar, Padmanabhan Balasubramanian, Douglas Leslie Maskell:
Image Compression using Approximate Addition. TENCON 2021: 1-6 - [i29]P. Balasubramanian, Raunaq Nayar, Douglas L. Maskell:
Gate-Level Static Approximate Adders. CoRR abs/2112.09320 (2021) - 2020
- [j7]Padmanabhan Balasubramanian, Nikos E. Mastorakis:
Quasi-Delay-Insensitive Implementation of Approximate Addition. Symmetry 12(11): 1919 (2020) - [c14]Raunaq Nayar, Padmanabhan Balasubramanian, Douglas L. Maskell:
Hardware Optimized Approximate Adder with Normal Error Distribution. ISVLSI 2020: 84-89 - [i28]P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis:
Area Optimized Quasi Delay Insensitive Majority Voter for TMR Applications. CoRR abs/2008.05685 (2020)
2010 – 2019
- 2019
- [j6]Jaytrilok Choudhary, P. Balasubramanian, Danny M. Varghese, Dhirendra Pratap Singh, Douglas L. Maskell:
Generalized Majority Voter Design Method for N-Modular Redundant Systems Used in Mission- and Safety-Critical Applications. Comput. 8(1): 10 (2019) - [c13]P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis:
Area Optimized Quasi Delay Insensitive Majority Voter for TMR Applications. EECS 2019: 37-44 - [i27]P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis:
Asynchronous Early Output Block Carry Lookahead Adder with Improved Quality of Results. CoRR abs/1901.09315 (2019) - [i26]P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis:
Majority and Minority Voted Redundancy for Safety-Critical Applications. CoRR abs/1901.09316 (2019) - [i25]P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis:
Speed and Energy Optimised Quasi-Delay-Insensitive Block Carry Lookahead Adder. CoRR abs/1903.09433 (2019) - [i24]P. Balasubramanian, Douglas L. Maskell:
Indicating Asynchronous Array Multipliers. CoRR abs/1905.05904 (2019) - [i23]P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis:
Indicating Asynchronous Multipliers. CoRR abs/1905.11231 (2019) - [i22]P. Balasubramanian:
Performance Comparison of Quasi-Delay-Insensitive Asynchronous Adders. CoRR abs/1907.10826 (2019) - 2018
- [j5]P. Balasubramanian, Douglas L. Maskell:
A Self-Healing Redundancy Scheme for Mission/Safety-Critical Applications. IEEE Access 6: 69640-69649 (2018) - [c12]P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis:
Indicating Asynchronous Multipliers. EECS 2018: 547-553 - [c11]P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis:
Asynchronous Early Output Block Carry Lookahead Adder with Improved Quality of Results. MWSCAS 2018: 587-590 - [c10]P. Balasubramanian, Douglas L. Maskell, Nikos E. Mastorakis:
Majority and Minority Voted Redundancy for Safety-Critical Applications. MWSCAS 2018: 1102-1105 - [c9]P. Balasubramanian, Douglas L. Maskell, Krishnamachar Prasad:
A System Health Indicator for the Distributed Minority and Majority Voting Based Redundancy Scheme. TENCON 2018: 530-535 - [c8]P. Balasubramanian, Douglas L. Maskell:
Hardware Efficient Approximate Adder Design. TENCON 2018: 806-810 - [i21]P. Balasubramanian:
Approximate Early Output Asynchronous Adders Based on Dual-Rail Data Encoding and 4-Phase Return-to-Zero and Return-to-One Handshaking. CoRR abs/1801.06070 (2018) - [i20]P. Balasubramanian:
Comments on "Dual-rail asynchronous logic multi-level implementation". CoRR abs/1802.00004 (2018) - [i19]P. Balasubramanian:
Asynchronous Ripple Carry Adder based on Area Optimized Early Output Dual-Bit Full Adder. CoRR abs/1807.09762 (2018) - [i18]P. Balasubramanian:
Performance Comparison of some Synchronous Adders. CoRR abs/1810.01115 (2018) - 2017
- [c7]P. Balasubramanian, Cuong Dang:
A comparison of quasi-delay-insensitive asynchronous adder designs corresponding to return-to-zero and return-to-one handshaking. MWSCAS 2017: 1192-1195 - [c6]P. Balasubramanian, Cuong Dang, Douglas L. Maskell:
Approximate quasi-delay-insensitive asynchronous adders: Design and analysis. MWSCAS 2017: 1196-1199 - [i17]P. Balasubramanian, K. Prasad:
Asynchronous Early Output Dual-Bit Full Adders Based on Homogeneous and Heterogeneous Delay-Insensitive Data Encoding. CoRR abs/1704.07619 (2017) - [i16]P. Balasubramanian, K. Prasad:
Latency Optimized Asynchronous Early Output Ripple Carry Adder based on Delay-Insensitive Dual-Rail Data Encoding. CoRR abs/1706.04487 (2017) - [i15]P. Balasubramanian, R. T. Naayagi:
Redundant Logic Insertion and Fault Tolerance Improvement in Combinational Circuits. CoRR abs/1707.06909 (2017) - [i14]P. Balasubramanian, R. T. Naayagi:
Mathematical Estimation of Logical Masking Capability of Majority/Minority Gates Used in Nanoelectronic Circuits. CoRR abs/1707.06913 (2017) - [i13]P. Balasubramanian, Cuong Dang, Douglas L. Maskell, K. Prasad:
Asynchronous Early Output Section-Carry Based Carry Lookahead Adder with Alias Carry Logic. CoRR abs/1710.05470 (2017) - [i12]P. Balasubramanian, Cuong Dang, Douglas L. Maskell, K. Prasad:
Approximate Ripple Carry and Carry Lookahead Adders - A Comparative Analysis. CoRR abs/1710.05474 (2017) - [i11]P. Balasubramanian:
A Critique on "Asynchronous Logic Implementation Based on Factorized DIMS". CoRR abs/1711.02333 (2017) - 2016
- [j4]P. Balasubramanian:
Comments on "Dual-rail asynchronous logic multi-level implementation". Integr. 52: 34-40 (2016) - [i10]P. Balasubramanian, Nikos E. Mastorakis:
ASIC-based Implementation of Synchronous Section-Carry Based Carry Lookahead Adders. CoRR abs/1603.07961 (2016) - [i9]P. Balasubramanian, Nikos E. Mastorakis:
Global versus Local Weak-Indication Self-Timed Function Blocks - A Comparative Analysis. CoRR abs/1603.07962 (2016) - [i8]P. Balasubramanian, Nikos E. Mastorakis:
Power, Delay and Area Comparisons of Majority Voters relevant to TMR Architectures. CoRR abs/1603.07964 (2016) - [i7]P. Balasubramanian, Shigeru Yamashita:
Area/latency optimized early output asynchronous full adders and relative-timed ripple carry adders. CoRR abs/1604.04006 (2016) - [i6]P. Balasubramanian, Nikos E. Mastorakis:
An Asynchronous Early Output Full Adder and a Relative-Timed Ripple Carry Adder. CoRR abs/1605.03770 (2016) - [i5]P. Balasubramanian, K. Prasad, Nikos E. Mastorakis:
A Fault Tolerance Improved Majority Voter for TMR System Architectures. CoRR abs/1605.03771 (2016) - [i4]P. Balasubramanian, Nikos E. Mastorakis:
Design of Synchronous Section-Carry Based Carry Lookahead Adders with Improved Figure of Merit. CoRR abs/1606.05621 (2016) - [i3]P. Balasubramanian, K. Prasad:
Early Output Hybrid Input Encoded Asynchronous Full Adder and Relative-Timed Ripple Carry Adder. CoRR abs/1608.01225 (2016) - [i2]P. Balasubramanian, Nikos E. Mastorakis:
System Reliability, Fault Tolerance and Design Metrics Tradeoffs in the Distributed Minority and Majority Voting Based Redundancy Scheme. CoRR abs/1608.07036 (2016) - [i1]P. Balasubramanian, Nikos E. Mastorakis:
FPGA Based Implementation of Distributed Minority and Majority Voting Based Redundancy for Mission and Safety-Critical Applications. CoRR abs/1611.09446 (2016) - 2015
- [j3]P. Balasubramanian, Douglas L. Maskell:
A distributed minority and majority voting based redundancy scheme. Microelectron. Reliab. 55(9-10): 1373-1378 (2015) - 2013
- [j2]P. Balasubramanian, David A. Edwards, William B. Toms:
Self-Timed Section-Carry Based Carry Lookahead Adders and the Concept of Alias Logic. J. Circuits Syst. Comput. 22(4) (2013) - [c5]P. Balasubramanian, Shigeru Yamashita:
On the Error Resiliency of Combinational Logic Cells - Implications for Nano-based Digital Design. PRDC 2013: 118-119 - 2012
- [j1]P. Balasubramanian, David A. Edwards, William B. Toms:
Redundant Logic Insertion and Latency Reduction in Self-Timed Adders. VLSI Design 2012: 575389:1-575389:13 (2012) - 2010
- [b1]Padmanabhan Balasubramanian:
Self-Timed Logic and the Design of Self-Timed Adders. University of Manchester, UK, 2010
2000 – 2009
- 2009
- [c4]P. Balasubramanian, David A. Edwards, Charlie Brej:
Self-timed full adder designs based on hybrid input encoding. DDECS 2009: 56-61 - [c3]P. Balasubramanian, Doug A. Edwards:
Dual-Sum Single-Carry Self-Timed Adder Designs. ISVLSI 2009: 121-126 - 2008
- [c2]P. Balasubramanian, David A. Edwards:
A New Design Technique for Weakly Indicating Function Blocks. DDECS 2008: 116-121 - [c1]P. Balasubramanian, David A. Edwards:
Efficient Realization of Strongly Indicating Function Blocks. ISVLSI 2008: 429-432
Coauthor Index
aka: Douglas Leslie Maskell
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