"Identifying Tests for Logic Fault Models Involving Subsets of Lines ..."

Irith Pomeranz, Sudhakar M. Reddy (2010)

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DOI: 10.1109/VLSI.DESIGN.2010.16

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Irith Pomeranz, Sudhakar M. Reddy:
Identifying Tests for Logic Fault Models Involving Subsets of Lines without Fault Enumeration. VLSI Design 2010: 39-44

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