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"Design-for-Testability for Improved Path Delay Fault Coverage of Critical ..."

Irith Pomeranz, Sudhakar M. Reddy (2008)

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DOI: 10.1109/VLSI.2008.22

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
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  persistent URL:
  - https://dblp.org/rec/conf/vlsid/PomeranzR08
Irith Pomeranz, Sudhakar M. Reddy:
Design-for-Testability for Improved Path Delay Fault Coverage of Critical Paths. VLSI Design 2008: 175-180

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