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"Scalable Hardware Architecture for Invertible Logic with Sparse ..."

Naoya Onizawa, Akira Tamakoshi, Takahiro Hanyu (2021)

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DOI: 10.1109/SIPS52927.2021.00047

access: closed

type: Conference or Workshop Paper

metadata version: 2021-11-17

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Naoya Onizawa, Akira Tamakoshi, Takahiro Hanyu:
Scalable Hardware Architecture for Invertible Logic with Sparse Hamiltonian Matrices. SiPS 2021: 1-6

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