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"Fault Simulation Based Test Generation for Combinational Circuits Using ..."

Irith Pomeranz, Sudhakar M. Reddy (1999)

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DOI: 10.1109/ICCD.1999.808575

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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  - https://dblp.org/rec/conf/iccd/PomeranzR99
Irith Pomeranz, Sudhakar M. Reddy:
Fault Simulation Based Test Generation for Combinational Circuits Using Dynamically Selected Sub-Circuits. ICCD 1999: 412-417

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