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"Design guideline for resistive termination of on-chip high-speed ..."

Akira Tsuchiya, Masanori Hashimoto, Hidetoshi Onodera (2005)

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DOI: 10.1109/CICC.2005.1568742

access: closed

type: Conference or Workshop Paper

metadata version: 2022-01-03

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Akira Tsuchiya, Masanori Hashimoto, Hidetoshi Onodera:
Design guideline for resistive termination of on-chip high-speed interconnects. CICC 2005: 613-616

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