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ORCIDFrits W. Vaandrager
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- affiliation: Radboud University, Nijmegen, The Netherlands
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2020 – today
- 2024
[c82]Frits W. Vaandrager
:
A New Perspective on Conformance Testing Based on Apartness. Logics and Type Systems in Theory and Practice 2024: 225-240- [i12]Véronique Bruyère, Bharat Garhewal, Guillermo A. Pérez, Gaëtan Staquet, Frits W. Vaandrager:
Active Learning of Mealy Machines with Timers. CoRR abs/2403.02019 (2024) - 2023
- [j33]Frits W. Vaandrager, Masoud Ebrahimi, Roderick Bloem:
Learning Mealy machines with one timer. Inf. Comput. 295(Part B): 105013 (2023) - [c81]Véronique Bruyère, Guillermo A. Pérez, Gaëtan Staquet, Frits W. Vaandrager:
Automata with Timers. FORMATS 2023: 33-49 - [c80]Frits W. Vaandrager, Thorsten Wißmann:
Action Codes. ICALP 2023: 137:1-137:20 - [c79]Loes Kruger, Bharat Garhewal, Frits W. Vaandrager:
Lower Bounds for Active Automata Learning. ICGI 2023: 157-180 - [i11]Frits W. Vaandrager, Thorsten Wißmann:
Action Codes. CoRR abs/2301.00199 (2023) - [i10]Véronique Bruyère, Guillermo A. Pérez, Gaëtan Staquet, Frits W. Vaandrager:
Automata with Timers. CoRR abs/2305.07451 (2023) - 2022
- [j32]Frits W. Vaandrager, Abhisek Midya:
A Myhill-Nerode theorem for register automata and symbolic trace languages. Theor. Comput. Sci. 912: 37-55 (2022) - [c78]Frits W. Vaandrager, Bharat Garhewal, Jurriaan Rot, Thorsten Wißmann:
A New Approach for Active Automata Learning Based on Apartness. TACAS (1) 2022: 223-243 - 2021
- [j31]Petra van den Bos, Frits W. Vaandrager:
State identification for labeled transition systems with inputs and outputs. Sci. Comput. Program. 209: 102678 (2021) - [c77]Frits W. Vaandrager:
Active Automata Learning: from L* to L#. FMCAD 2021: 1 - [c76]Frits W. Vaandrager, Roderick Bloem, Masoud Ebrahimi:
Learning Mealy Machines with One Timer. LATA 2021: 157-170 - [i9]Frits W. Vaandrager, Bharat Garhewal, Jurriaan Rot, Thorsten Wißmann:
A New Approach for Active Automata Learning Based on Apartness. CoRR abs/2107.05419 (2021) - 2020
- [c75]Frits W. Vaandrager, Abhisek Midya:
A Myhill-Nerode Theorem for Register Automata and Symbolic Trace Languages. ICTAC 2020: 43-63 - [c74]Bharat Garhewal, Frits W. Vaandrager, Falk Howar, Timo Schrijvers, Toon Lenaerts, Rob Smits:
Grey-Box Learning of Register Automata. IFM 2020: 22-40 - [c73]Abhisek Midya, Frits W. Vaandrager, D. Gnanaraj Thomas, Chandrima Ghosh:
Simulating Parallel Internal Column Contextual Array Grammars Using Two-Dimensional Parallel Restarting Automata with Multiple Windows. IWCIA 2020: 106-122 - [i8]Frits W. Vaandrager, Abhisek Midya:
A Myhill-Nerode Theorem for Register Automata and Symbolic Trace Languages. CoRR abs/2007.03540 (2020) - [i7]Bharat Garhewal, Frits W. Vaandrager, Falk Howar, Timo Schrijvers, Toon Lenaerts, Rob Smits:
Grey-Box Learning of Register Automata. CoRR abs/2009.09975 (2020)
2010 – 2019
- 2019
- [c72]Petra van den Bos, Frits W. Vaandrager:
State Identification for Labeled Transition Systems with Inputs and Outputs. FACS 2019: 191-212 - [c71]Frits W. Vaandrager:
Automata Learning and Galois Connections (Invited Talk). ICALP 2019: 4:1-4:1 - [c70]Ramon Janssen, Frits W. Vaandrager, Jan Tretmans:
Relating Alternating Relations for Conformance and Refinement. IFM 2019: 246-264 - [c69]Alexis Linard, Colin de la Higuera, Frits W. Vaandrager:
Learning Unions of k-Testable Languages. LATA 2019: 328-339 - [c68]Marc Jasper, Malte Mues, Alnis Murtovi, Maximilian Schlüter, Falk Howar, Bernhard Steffen, Markus Schordan, Dennis Hendriks, Ramon R. H. Schiffelers, Harco Kuppens, Frits W. Vaandrager:
RERS 2019: Combining Synthesis with Real-World Models. TACAS (3) 2019: 101-115 - [p1]Falk Howar, Bengt Jonsson, Frits W. Vaandrager:
Combining Black-Box and White-Box Techniques for Learning Register Automata. Computing and Software Science 2019: 563-588 - [i6]Petra van den Bos, Frits W. Vaandrager:
State Identification for Labeled Transition Systems with Inputs and Outputs. CoRR abs/1907.11034 (2019) - [i5]Ramon Janssen, Frits W. Vaandrager, Jan Tretmans:
Relating Alternating Relations for Conformance and Refinement. CoRR abs/1909.13604 (2019) - 2018
- [c67]Daniel Neider, Rick Smetsers, Frits W. Vaandrager, Harco Kuppens:
Benchmarks for Automata Learning and Conformance Testing. Models, Mindsets, Meta 2018: 390-416 - [c66]Rick Smetsers, Paul Fiterau-Brostean, Frits W. Vaandrager:
Model Learning as a Satisfiability Modulo Theories Problem. LATA 2018: 182-194 - [i4]Alexis Linard, Colin de la Higuera, Frits W. Vaandrager:
Learning Unions of k-Testable Languages. CoRR abs/1812.08269 (2018) - 2017
- [j30]Frits W. Vaandrager:
Model learning. Commun. ACM 60(2): 86-95 (2017) - [c65]Paul Fiterau-Brostean, Toon Lenaerts, Erik Poll, Joeri de Ruiter, Frits W. Vaandrager, Patrick Verleg:
Model learning and model checking of SSH implementations. SPIN 2017: 142-151 - [i3]Alexis Linard, Rick Smetsers, Frits W. Vaandrager, Umar Waqas, Joost van Pinxten, Sicco Verwer:
Learning Pairwise Disjoint Simple Languages from Positive Examples. CoRR abs/1706.01663 (2017) - 2016
- [c64]Paul Fiterau-Brostean, Ramon Janssen, Frits W. Vaandrager:
Combining Model Learning and Model Checking to Analyze TCP Implementations. CAV (2) 2016: 454-471 - [c63]Petra van den Bos, Rick Smetsers, Frits W. Vaandrager:
Enhancing Automata Learning by Log-Based Metrics. IFM 2016: 295-310 - [c62]Mathijs Schuts, Jozef Hooman, Frits W. Vaandrager:
Refactoring of Legacy Software Using Model Learning and Equivalence Checking: An Industrial Experience Report. IFM 2016: 311-325 - 2015
- [j29]Fides Aarts, Bengt Jonsson, Johan Uijen, Frits W. Vaandrager:
Generating models of infinite-state communication protocols using regular inference with abstraction. Formal Methods Syst. Des. 46(1): 1-41 (2015) - [c61]Wouter Smeenk, Joshua Moerman, Frits W. Vaandrager, David N. Jansen:
Applying Automata Learning to Embedded Control Software. ICFEM 2015: 67-83 - [c60]Fides Aarts, Paul Fiterau-Brostean, Harco Kuppens, Frits W. Vaandrager:
Learning Register Automata with Fresh Value Generation. ICTAC 2015: 165-183 - 2014
- [j28]Frits W. Vaandrager, Freek Verbeek:
Recreational Formal Methods: Designing Vacuum Cleaning Trajectories. Bull. EATCS 113 (2014) - [j27]Fides Aarts, Harco Kuppens, Jan Tretmans, Frits W. Vaandrager, Sicco Verwer:
Improving active Mealy machine learning for protocol conformance testing. Mach. Learn. 96(1-2): 189-224 (2014) - [c59]Paul Fiterau-Brostean, Ramon Janssen, Frits W. Vaandrager:
Learning Fragments of the TCP Network Protocol. FMICS 2014: 78-93 - [c58]Rick Smetsers, Michele Volpato, Frits W. Vaandrager, Sicco Verwer:
Bigger is Not Always Better: on the Quality of Hypotheses in Active Automata Learning. ICGI 2014: 167-181 - [c57]Fides Aarts, Falk Howar, Harco Kuppens, Frits W. Vaandrager:
Algorithms for Inferring Register Automata - A Comparison of Existing Approaches. ISoLA (1) 2014: 202-219 - 2013
- [j26]Fred Houben, Georgeta Igna, Frits W. Vaandrager:
Modeling task systems using parameterized partial orders. Int. J. Softw. Tools Technol. Transf. 15(3): 269-286 (2013) - [c56]Abdeldjalil Boudjadar, Frits W. Vaandrager, Jean-Paul Bodeveix, Mamoun Filali:
Extending UPPAAL for the Modeling and Verification of Dynamic Real-Time Systems. FSEN 2013: 111-132 - 2012
- [j25]Faranak Heidarian, Julien Schmaltz, Frits W. Vaandrager:
Analysis of a clock synchronization protocol for wireless sensor networks. Theor. Comput. Sci. 413(1): 87-105 (2012) - [c55]Fides Aarts, Faranak Heidarian, Frits W. Vaandrager:
A Theory of History Dependent Abstractions for Learning Interface Automata. CONCUR 2012: 240-255 - [c54]Martijn Hendriks, Frits W. Vaandrager:
Reconstructing Critical Paths from Execution Traces. CSE 2012: 524-531 - [c53]Fides Aarts, Faranak Heidarian, Harco Kuppens, Petur Olsen, Frits W. Vaandrager:
Automata Learning through Counterexample Guided Abstraction Refinement. FM 2012: 10-27 - [c52]Frits W. Vaandrager:
Active Learning of Extended Finite State Machines. ICTSS 2012: 5-7 - [c51]Fred Houben, Georgeta Igna, Frits W. Vaandrager:
Modeling Task Systems Using Parameterized Partial Orders. IEEE Real-Time and Embedded Technology and Applications Symposium 2012: 317-327 - [c50]Fides Aarts, Harco Kuppens, Jan Tretmans, Frits W. Vaandrager, Sicco Verwer:
Learning and Testing the Bounded Retransmission Protocol. ICGI 2012: 4-18 - 2011
- [j24]Jasper Berendsen, Biniam Gebremichael, Frits W. Vaandrager, Miaomiao Zhang:
Formal specification and analysis of zeroconf using uppaalS. ACM Trans. Embed. Comput. Syst. 10(3): 34:1-34:32 (2011) - 2010
- [b2]Dilsun Kirli Kaynar, Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager:
The Theory of Timed I/O Automata, Second Edition. Synthesis Lectures on Distributed Computing Theory, Morgan & Claypool Publishers 2010, ISBN 978-3-031-00875-7 - [j23]Jasper Berendsen, David N. Jansen, Julien Schmaltz, Frits W. Vaandrager:
The axiomatization of override and update. J. Appl. Log. 8(1): 141-150 (2010) - [c49]Fides Aarts, Frits W. Vaandrager:
Learning I/O Automata. CONCUR 2010: 71-85 - [c48]Georgeta Igna, Frits W. Vaandrager:
Verification of Printer Datapaths Using Timed Automata. ISoLA (2) 2010: 412-423 - [c47]Fides Aarts, Julien Schmaltz, Frits W. Vaandrager:
Inference and Abstraction of the Biometric Passport. ISoLA (1) 2010: 673-686 - [c46]Jasper Berendsen, David N. Jansen, Frits W. Vaandrager:
Fortuna: Model Checking Priced Probabilistic Timed Automata. QEST 2010: 273-281
2000 – 2009
- 2009
- [c45]Faranak Heidarian, Julien Schmaltz, Frits W. Vaandrager:
Analysis of a Clock Synchronization Protocol for Wireless Sensor Networks. FM 2009: 516-531 - [c44]Israa AlAttili, Fred Houben, Georgeta Igna, Steffen Michels, Feng Zhu, Frits W. Vaandrager:
Adaptive Scheduling of Data Paths using Uppaal Tiga. QFM 2009: 1-11 - [c43]Mathijs Schuts, Feng Zhu, Faranak Heidarian, Frits W. Vaandrager:
Modelling Clock Synchronization in the Chess gMAC WSN Protocol. QFM 2009: 41-54 - [e3]Joël Ouaknine, Frits W. Vaandrager:
Formal Modeling and Analysis of Timed Systems, 7th International Conference, FORMATS 2009, Budapest, Hungary, September 14-16, 2009. Proceedings. Lecture Notes in Computer Science 5813, Springer 2009, ISBN 978-3-642-04367-3 [contents] - 2008
- [j22]Roelof Hamberg, Frits W. Vaandrager:
Using model checkers in an introductory course on operating systems. ACM SIGOPS Oper. Syst. Rev. 42(6): 101-111 (2008) - [c42]Georgeta Igna, Venkatesh Kannan, Yang Yang, Twan Basten, Marc Geilen, Frits W. Vaandrager, Marc Voorhoeve, Sebastian de Smet, Lou J. Somers:
Formal Modeling and Scheduling of Datapaths of Digital Document Printers. FORMATS 2008: 170-187 - [c41]Jasper Berendsen, Frits W. Vaandrager:
Compositional Abstraction in Real-Time Model Checking. FORMATS 2008: 233-249 - 2007
- [j21]Ling Cheung, Mariëlle Stoelinga, Frits W. Vaandrager:
A testing scenario for probabilistic processes. J. ACM 54(6): 29 (2007) - [j20]Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager:
Observing Branching Structure through Probabilistic Contexts. SIAM J. Comput. 37(4): 977-1013 (2007) - 2006
- [b1]Dilsun Kirli Kaynar, Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager:
The Theory of Timed I/O Automata. Synthesis Lectures on Computer Science, Morgan & Claypool Publishers 2006 - [j19]Frits W. Vaandrager, Adriaan de Groot:
Analysis of a biphase mark protocol with Uppaaland PVS. Formal Aspects Comput. 18(4): 433-458 (2006) - [j18]Martijn Hendriks, Barend van den Nieuwelaar, Frits W. Vaandrager:
Model checker aided design of a controller for a wafer scanner. Int. J. Softw. Tools Technol. Transf. 8(6): 633-647 (2006) - [j17]Ling Cheung, Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager:
Switched PIOA: Parallel composition via distributed scheduling. Theor. Comput. Sci. 365(1-2): 83-108 (2006) - [c40]Biniam Gebremichael, Frits W. Vaandrager, Miaomiao Zhang:
Analysis of the zeroconf protocol using UPPAAL. EMSOFT 2006: 242-251 - 2005
- [c39]Biniam Gebremichael, Frits W. Vaandrager, Miaomiao Zhang, Kees Goossens, Edwin Rijpkema, Andrei Radulescu:
Deadlock Prevention in the Æthereal Protocol. CHARME 2005: 345-348 - [c38]Biniam Gebremichael, Frits W. Vaandrager:
Specifying Urgency in Timed I/O Automata. SEFM 2005: 64-74 - 2004
- [j16]W. O. David Griffioen, Frits W. Vaandrager:
A theory of normed simulations. ACM Trans. Comput. Log. 5(4): 577-610 (2004) - [c37]Ling Cheung, Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager:
Switched Probabilistic I/O Automata. ICTAC 2004: 494-510 - [c36]Martijn Hendriks, Barend van den Nieuwelaar, Frits W. Vaandrager:
Model Checker Aided Design of a Controller for a Wafer Scanner. ISoLA (Preliminary proceedings) 2004: 201-208 - 2003
- [j15]Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager:
Hybrid I/O automata. Inf. Comput. 185(1): 105-157 (2003) - [c35]Rob J. van Glabbeek, Frits W. Vaandrager:
Bundle Event Structures and CCSP. CONCUR 2003: 57-71 - [c34]Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager:
Compositionality for Probabilistic Automata. CONCUR 2003: 204-222 - [c33]Henrik C. Bohnenkamp, Peter van der Stok, Holger Hermanns, Frits W. Vaandrager:
Cost-Optimization of the IPv4 Zeroconf Protocol. DSN 2003: 531-540 - [c32]Martijn Hendriks, Gerd Behrmann, Kim Guldstrand Larsen, Peter Niebert, Frits W. Vaandrager:
Adding Symmetry Reduction to Uppaal. FORMATS 2003: 46-59 - [c31]Biniam Gebremichael, Frits W. Vaandrager:
Control Synthesis for a Smart Card Personalization System Using Symbolic Model Checking. FORMATS 2003: 189-203 - [c30]Mariëlle Stoelinga, Frits W. Vaandrager:
A Testing Scenario for Probabilistic Automata. ICALP 2003: 464-477 - [c29]Ansgar Fehnker, Frits W. Vaandrager, Miaomiao Zhang:
Modeling and Verifying a Lego Car Using Hybrid I/O Automata. QSIC 2003: 280-289 - [c28]Dilsun Kirli Kaynar, Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager:
Timed I/O Automata: A Mathematical Framework for Modeling and Analyzing Real-Time Systems. RTSS 2003: 166-177 - 2002
- [j14]Thomas Hune, Judi Romijn, Mariëlle Stoelinga, Frits W. Vaandrager:
Linear parametric model checking of timed automata. J. Log. Algebraic Methods Program. 52-53: 183-220 (2002) - 2001
- [j13]Jan Springintveld, Frits W. Vaandrager, Pedro R. D'Argenio:
Testing timed automata. Theor. Comput. Sci. 254(1-2): 225-257 (2001) - [c27]Gerd Behrmann, Ansgar Fehnker, Thomas Hune, Kim Guldstrand Larsen, Paul Pettersson, Judi Romijn, Frits W. Vaandrager:
Minimum-Cost Reachability for Priced Timed Automata. HSCC 2001: 147-161 - [c26]Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager:
Hybrid I/O Automata Revisited. HSCC 2001: 403-417 - [c25]Thomas Hune, Judi Romijn, Mariëlle Stoelinga, Frits W. Vaandrager:
Linear Parametric Model Checking of Timed Automata. TACAS 2001: 189-203 - 2000
- [j12]Marco Devillers, W. O. David Griffioen, Judi Romijn, Frits W. Vaandrager:
Verification of a Leader Election Protocol: Formal Methods Applied to IEEE 1394. Formal Methods Syst. Des. 16(3): 307-320 (2000) - [c24]Gerd Behrmann, Thomas Hune, Frits W. Vaandrager:
Distributing Timed Model Checking - How the Search Order Matters. CAV 2000: 216-231 - [i2]W. O. David Griffioen, Frits W. Vaandrager:
A theory of normed simulations. CoRR cs.LO/0007030 (2000)
1990 – 1999
- 1999
- [c23]Mariëlle Stoelinga, Frits W. Vaandrager:
Root Contention in IEEE 1394. ARTS 1999: 53-74 - [c22]Frits W. Vaandrager:
Verification of Hybrid Systems (abstract). ARTS 1999: 151 - [e2]Frits W. Vaandrager, Jan H. van Schuppen:
Hybrid Systems: Computation and Control, Second International Workshop, HSCC'99, Berg en Dal, The Netherlands, March 29-31, 1999, Proceedings. Lecture Notes in Computer Science 1569, Springer 1999, ISBN 3-540-65734-7 [contents] - 1998
- [c21]W. O. David Griffioen, Frits W. Vaandrager:
Normed Simulations. CAV 1998: 332-344 - [c20]Henning Dierks, Ansgar Fehnker, Angelika Mader, Frits W. Vaandrager:
Operational and Logical Semantics for Polling Real-Time Systems. FTRTFT 1998: 29-40 - [e1]Grzegorz Rozenberg, Frits W. Vaandrager:
Lectures on Embedded Systems, European Educational Forum, School on Embedded Systems, Veldhoven, The Netherlands, November 25-29, 1996. Lecture Notes in Computer Science 1494, Springer 1998, ISBN 3-540-65193-4 [contents] - 1997
- [j11]Rob J. van Glabbeek, Frits W. Vaandrager:
The Difference between Splitting in n and n+1. Inf. Comput. 136(2): 109-142 (1997) - [c19]Frits W. Vaandrager:
A Theory of Testing for Timed Automata (Abstract). TAPSOFT 1997: 39 - 1996
- [j10]Nancy A. Lynch, Frits W. Vaandrager:
Action Transducers and Timed Automata. Formal Aspects Comput. 8(5): 499-538 (1996) - [j9]Nancy A. Lynch, Frits W. Vaandrager:
Forward and Backward Simulations, II: Timing-Based Systems. Inf. Comput. 128(1): 1-25 (1996) - [j8]Judi Romijn, Frits W. Vaandrager:
A Note on Fairness in I/O Automata. Inf. Process. Lett. 59(5): 245-250 (1996) - [c18]Frits W. Vaandrager:
Introduction. European Educational Forum: School on Embedded Systems 1996: 1-3 - [c17]Jan Springintveld, Frits W. Vaandrager:
Minimizable Timed Automata. FTRTFT 1996: 130-147 - 1995
- [j7]Nancy A. Lynch, Frits W. Vaandrager:
Forward and Backward Simulations: I. Untimed Systems. Inf. Comput. 121(2): 214-233 (1995) - [j6]Rocco De Nicola, Frits W. Vaandrager:
Three Logics for Branching Bisimulation. J. ACM 42(2): 458-487 (1995) - [c16]Frits W. Vaandrager:
Verification of a Distributed Summation Algorithm. CONCUR 1995: 190-203 - [c15]Nancy A. Lynch, Roberto Segala, Frits W. Vaandrager, Henri B. Weinberg:
Hybrid I/O Automata. Hybrid Systems 1995: 496-510 - 1994
- [j5]Luca Aceto, Bard Bloom, Frits W. Vaandrager:
Turning SOS Rules into Equations. Inf. Comput. 111(1): 1-52 (1994) - [c14]Doeko Bosscher, Indra Polak, Frits W. Vaandrager:
Verification of an Audio Control Protocol. FTRTFT 1994: 170-192 - 1993
- [j4]Rob J. van Glabbeek, Frits W. Vaandrager:
Modular Specification of Process Algebras. Theor. Comput. Sci. 113(2): 293-348 (1993) - [c13]Leen Helmink, M. P. A. Sellink, Frits W. Vaandrager:
Proof-Checking a Data Link Protocol. TYPES 1993: 127-165 - 1992
- [j3]Jos C. M. Baeten, Frits W. Vaandrager:
An Algebra for Process Creation. Acta Informatica 29(4): 303-334 (1992) - [j2]Jan Friso Groote, Frits W. Vaandrager:
Structured Operational Semantics and Bisimulation as a Congruence. Inf. Comput. 100(2): 202-260 (1992) - [c12]Frits W. Vaandrager, Nancy A. Lynch:
Action Transducers and Timed Automata. CONCUR 1992: 436-455 - [c11]