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ORCIDAdonios Thanailakis
- > Home > Persons > Adonios Thanailakis
Publications
- 2007
[j36]Konstantinos Tatas
, George Koutroumpezis, Dimitrios Soudris, Adonios Thanailakis:
Architecture design of a coarse-grain reconfigurable multiply-accumulate unit for data-intensive applications. Integr. 40(2): 74-93 (2007)- 2005
- [j29]Kostas Siozios, George Koutroumpezis, Konstantinos Tatas, Nikolaos Vassiliadis, Vasilios Kalenteridis, Haroula Pournara, Ilias Pappas, Dimitrios Soudris, Antonios Thanailakis, Spiridon Nikolaidis, Stilianos Siskos:
A Novel FPGA Architecture and an Integrated Framework of CAD Tools for Implementing Applications. IEICE Trans. Inf. Syst. 88-D(7): 1369-1380 (2005) - [c38]Dimitrios Soudris, Spiridon Nikolaidis, Stilianos Siskos, Konstantinos Tatas, Kostas Siozios, George Koutroumpezis, Nikolaos Vassiliadis, Vasilios Kalenteridis, Haroula Pournara, Ilias Pappas, Adonios Thanailakis:
AMDREL: a novel low-energy FPGA architecture and supporting CAD tool design flow. ASP-DAC 2005: 3-4 - [c36]Kostas Siozios, Konstantinos Tatas, George Koutroumpezis, D. J. Soudris, Adonios Thanailakis:
An Integrated Framework for Architecture Level Exploration of Reconfigurable Platform. FPL 2005: 658-661 - [c34]Kostas Siozios, George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis:
DAGGER: A Novel Generic Methodology for FPGA Bitstream Generation and Its Software Tool Implementation. IPDPS 2005 - 2004
- [c29]Kostas Siozios, George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis:
A Novel FPGA Configuration Bitstream Generation Algorithm and Tool Development. FPL 2004: 1116-1118 - [c28]Vasilios Kalenteridis, Haroula Pournara, Kostas Siozios, Konstantinos Tatas, George Koutroumpezis, Ilias Pappas, Spiridon Nikolaidis, Stilianos Siskos, D. J. Soudris, Adonios Thanailakis:
An Integrated FPGA Design Framework: Custom Designed FPGA Platform and Application Mapping Toolset Development. IPDPS 2004 - 2002
- [c18]George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Spyros Blionas, Kostas Masselos, Adonios Thanailakis:
Architecture Design of a Reconfigurable Multiplier for Flexible Coarse-Grain Implementations. FPL 2002: 1027-1036
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