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ORCIDReiner W. Hartenstein
- > Home > Persons > Reiner W. Hartenstein
Publications
- 2002
[c60]Michael Herz, Reiner W. Hartenstein, Miguel Miranda, Erik Brockmeyer, Francky Catthoor:
Memory addressing organization for stream-based reconfigurable computing. ICECS 2002: 813-817- 2000
- [c55]Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger:
KressArray Xplorer: a new CAD environment to optimize reconfigurable datapath array. ASP-DAC 2000: 163-168 - [c54]Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger:
Synthesis and domain-specific optimization of KressArray-based reconfigurable computing engines (poster abstract). FPGA 2000: 222 - [c53]Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger:
Generation of Design Suggestions for Coarse-Grain Reconfigurable Architectures. FPL 2000: 389-399 - 1999
- [c51]Reiner W. Hartenstein, Michael Herz, Ulrich Nageldinger, Thomas Hoffmann:
An Internet Based Development Framework for Reconfigurable Computing. FPL 1999: 155-164 - [c50]Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger:
Mapping Applications onto Reconfigurable Kress Arrays. FPL 1999: 385-390 - 1998
- [c48]Jürgen Becker, Reiner W. Hartenstein, Michael Herz, Ulrich Nageldinger:
Parallelization in Co-Compilation for Configurable Accelerators. ASP-DAC 1998: 23-33 - [c47]Reiner W. Hartenstein, Michael Herz, Frank Gilbert:
Designing for Xilinx XC6200 FPGAs. FPL 1998: 29-38 - [c46]Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger:
Exploiting Contemporary Memory Techniques in Reconfigurable Accelerators. FPL 1998: 189-198 - [c44]Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger:
On Reconfigurable Co-processing Units. IPPS/SPDP Workshops 1998: 67-72 - 1997
- [c42]Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Ulrich Nageldinger:
A Novel Universal Sequencer Hardware. ARCS 1997: 143-152 - [c41]Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Ulrich Nageldinger:
A Novel Sequencer Hardware for Application Specific Computing. ASAP 1997: 392-401 - [c39]Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Ulrich Nageldinger:
Data scheduling to increase performance of parallel accelerators. FPL 1997: 294-303 - 1996
- [c35]Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Rainer Kress, Ulrich Nageldinger:
A Synthesis System For Bus-Based Wavefront Array Architectures. ASAP 1996: 274-283 - [c30]Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Rainer Kress, Ulrich Nageldinger:
A Partitioning Programming Environment for a Novel Parallel Architecture. IPPS 1996: 544-548
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