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Journal Articles
- 2015
[j4]Gustavo de Melo Valeira
, Gunnar Bedicks Jr., Cristiano Akamine, Edson Lemos Horta, Guido Stolfi:
Transport Stream Analysis of a ISDB-T Signal Using an Embedded and Reconfigurable System. IEEE Trans. Broadcast. 61(1): 30-38 (2015)- 2014
- [j3]Miguel Angelo de Abreu de Sousa, Edson Lemos Horta, Sergio Takeo Kofuji, Emilio Del-Moral-Hernandez:
Architecture Analysis of an FPGA-Based Hopfield Neural Network. Adv. Artif. Neural Syst. 2014: 602325:1-602325:10 (2014) - 2008
- [j2]Gunnar Bedicks Jr., Fujio Yamada, Francisco Sukys, Cristiano Akamine, Luis Tadeu Raunheitte, Edson Lemos Horta:
Handheld Digital TV Performance Evaluation Method. Int. J. Digit. Multim. Broadcast. 2008: 243937:1-243937:5 (2008) - 2002
- [j1]David E. Taylor, Jonathan S. Turner, John W. Lockwood, Edson L. Horta:
Dynamic hardware plugins: exploiting reconfigurable hardware for high-performance programmable routers. Comput. Networks 38(3): 295-310 (2002)
Conference and Workshop Papers
- 2018
- [c10]Khoa Dang Pham, Edson L. Horta, Dirk Koch, Anuj Vaishnav, Thomas Kuhn:
IPRDF: An Isolated Partial Reconfiguration Design Flow for Xilinx FPGAs. MCSoC 2018: 36-43 - 2017
- [c9]Khoa Dang Pham, Edson L. Horta, Dirk Koch:
BITMAN: A tool and API for FPGA bitstream manipulations. DATE 2017: 894-897 - 2015
- [c8]Luiz Fernando da Silva, Cristiano Akamine, Yuri Pontes Maciel, Gunnar Bedicks Jr., Edson Lemos Horta:
A proposal to use cloud transmission technique into the ISDB-T system. BMSB 2015: 1-5 - 2014
- [c7]Chrystianne Rocha, Cristiano Akamine, Gunnar Bedicks Jr., Edson Lemos Horta, Guido Stolfi:
Adaptive gap filler for digital terrestrial television. BMSB 2014: 1-6 - 2012
- [c6]Gunnar Bedicks Jr., Gustavo de Melo Valeira, Francisco Sukys, Renato de Mendonca Maroja, Cristiano Akamine, Yuri Pontes Maciel, Eduardo Santos Bueno, Edson Lemos Horta:
Interference from FM stations to ISDB-TB DTV reception. BMSB 2012: 1-7 - 2004
- [c5]Edson L. Horta, John W. Lockwood:
Automated Method to Generate Bitstream Intellectual Property Cores for Virtex FPGAs. FPL 2004: 975-979 - 2002
- [c4]Edson L. Horta, John W. Lockwood, David E. Taylor, David B. Parlour:
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration. DAC 2002: 343-348 - [c3]Edson L. Horta, John W. Lockwood, Sergio Takeo Kofuji:
Using PARBIT to Implement Partial Run-Time Reconfigurable Systems. FPL 2002: 182-191 - [c2]Edson L. Horta, Sergio Takeo Kofuji:
A Run-Time Reconfigurable ATM Switch. IPDPS 2002 - 2000
- [c1]Edson L. Horta, Sergio Takeo Kofuji:
Using reconfigurable logic to implement an active network. CATA 2000: 37-41
Coauthor Index
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