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Russell Stop
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2010 – 2019
- 2014
- [j3]Ahmed M. A. Ali
, Hüseyin Dinc, Paritosh Bhoraskar
, Christopher Dillon, Scott Puckett, Bryce Gray, Carroll Speir, Jonathan Lanford, Janet Brunsilius, Peter R. Derounian, Brad Jeffries, Ushma Mehta, Matthew McShea, Russell Stop:
A 14 Bit 1 GS/s RF Sampling Pipelined ADC With Background Calibration. IEEE J. Solid State Circuits 49(12): 2857-2867 (2014) - 2010
- [j2]Ahmed M. A. Ali
, Andrew S. Morgan, Christopher Dillon, Greg Patterson, Scott Puckett, Paritosh Bhoraskar
, Hüseyin Dinc, Mike Hensley, Russell Stop, Scott Bardsley, David Lattimore, Jeff Bray, Carroll Speir, Robert Sneed:
A 16-bit 250-MS/s IF Sampling Pipelined ADC With Background Calibration. IEEE J. Solid State Circuits 45(12): 2602-2612 (2010) - [c2]Ahmed M. A. Ali
, Andy Morgan, Christopher Dillon, Greg Patterson, Scott Puckett, Mike Hensley, Russell Stop, Paritosh Bhoraskar
, Scott Bardsley, David Lattimore, Jeff Bray, Carroll Speir, Robert Sneed:
A 16b 250MS/s IF-sampling pipelined A/D converter with background calibration. ISSCC 2010: 292-293
2000 – 2009
- 2004
- [c1]Mike Hensley, Carroll Speir, Russell Stop, Kevin Behel, Carl Moreland, Greg Patterson, Dan Kelly, Manish Manglani, Michael Elliott, Scott Puckett, Joe Young, Frank Murden:
A dual channel IF-digitizing IC with 117dB dynamic range at 300Mhz IF for EDGE/GSM base-stations [receiver]. CICC 2004: 413-416 - 2000
- [j1]Carl Moreland, Frank Murden, Michael Elliott, Joe Young, Mike Hensley, Russell Stop:
A 14-bit 100-Msample/s subranging ADC. IEEE J. Solid State Circuits 35(12): 1791-1798 (2000)
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last updated on 2024-04-24 23:09 CEST by the dblp team
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