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ORCIDYoung-kyu Choi
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2020 – today
- 2024
[j11]Young-kyu Choi
, Changsoo Kim:
FYalSAT: High-Throughput Stochastic Local Search K-SAT Solver on FPGA. IEEE Access 12: 65503-65512 (2024)- 2023
- [j10]Young Kyu Choi, Yuze Chi, Jason Lau, Jason Cong:
TARO: Automatic Optimization for Free-Running Kernels in FPGA High-Level Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(7): 2423-2427 (2023) - [j9]Young Kyu Choi, Carlos Santillana, Yujia Shen, Adnan Darwiche, Jason Cong:
FPGA Acceleration of Probabilistic Sentential Decision Diagrams with High-level Synthesis. ACM Trans. Reconfigurable Technol. Syst. 16(2): 18:1-18:22 (2023) - [c17]Michael Lo, Young-kyu Choi, Weikang Qiao, Mau-Chung Frank Chang, Jason Cong:
HMLib: Efficient Data Transfer for HLS Using Host Memory. FPGA 2023: 50 - 2022
- [c16]Linghao Song, Yuze Chi, Atefeh Sohrabizadeh, Young-kyu Choi, Jason Lau, Jason Cong:
Sextans: A Streaming Accelerator for General-Purpose Sparse-Matrix Dense-Matrix Multiplication. FPGA 2022: 65-77 - 2021
- [c15]Yuze Chi, Licheng Guo, Jason Lau, Young-kyu Choi, Jie Wang, Jason Cong:
Extending High-Level Synthesis for Task-Parallel Programs. FCCM 2021: 204-213 - [c14]Young-kyu Choi, Yuze Chi, Weikang Qiao, Nikola Samardzic, Jason Cong:
HBM Connect: High-Performance HLS Interconnect for FPGA HBM. FPGA 2021: 116-126 - [c13]Yuze Chi, Licheng Guo, Young-kyu Choi, Jie Wang, Jason Cong:
Extending High-Level Synthesis for Task-Parallel Programs. FPGA 2021: 225 - [i4]Linghao Song, Yuze Chi, Atefeh Sohrabizadeh, Young-kyu Choi, Jason Lau, Jason Cong:
Sextans: A Streaming Accelerator for General-Purpose Sparse-Matrix Dense-Matrix Multiplication. CoRR abs/2109.11081 (2021) - 2020
- [j8]Young-kyu Choi, Yuze Chi, Jie Wang, Jason Cong:
FLASH: Fast, Parallel, and Accurate Simulator for HLS. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 4828-4841 (2020) - [i3]Yuze Chi, Licheng Guo, Young-kyu Choi, Jie Wang, Jason Cong:
Extending High-Level Synthesis for Task-Parallel Programs. CoRR abs/2009.11389 (2020) - [i2]Young-kyu Choi, Yuze Chi, Jie Wang, Licheng Guo, Jason Cong:
When HLS Meets FPGA HBM: Benchmarking and Bandwidth Optimization. CoRR abs/2010.06075 (2020)
2010 – 2019
- 2019
- [b1]Young-kyu Choi:
Performance Debugging Frameworks for FPGA High-Level Synthesis. University of California, Los Angeles, USA, 2019 - [j7]Young-kyu Choi, Jason Cong, Zhenman Fang, Yuchen Hao, Glenn Reinman, Peng Wei:
In-Depth Analysis on Microarchitectures of Modern Heterogeneous CPU-FPGA Platforms. ACM Trans. Reconfigurable Technol. Syst. 12(1): 4:1-4:20 (2019) - [c12]Yuze Chi, Young-kyu Choi, Jason Cong, Jie Wang:
Rapid Cycle-Accurate Simulator for High-Level Synthesis. FPGA 2019: 178-183 - 2018
- [c11]Young-kyu Choi, Jason Cong:
HLS-based optimization and design space exploration for applications with variable loop bounds. ICCAD 2018: 103 - [i1]Yuze Chi, Young-kyu Choi, Jason Cong, Jie Wang:
Rapid Cycle-Accurate Simulator for High-Level Synthesis. CoRR abs/1812.07012 (2018) - 2017
- [c10]Young Kyu Choi, Jason Cong:
HLScope: High-Level Performance Debugging for FPGA Designs. FCCM 2017: 125-128 - [c9]Young-kyu Choi, Peng Zhang, Peng Li, Jason Cong:
HLScope+, : Fast and accurate performance estimation for FPGA HLS. ICCAD 2017: 691-698 - 2016
- [j6]Young Kyu Choi, Jason Cong:
Acceleration of EM-Based 3D CT Reconstruction Using FPGA. IEEE Trans. Biomed. Circuits Syst. 10(3): 754-767 (2016) - [c8]Young-kyu Choi, Jason Cong, Zhenman Fang, Yuchen Hao, Glenn Reinman, Peng Wei:
A quantitative analysis on microarchitectures of modern CPU-FPGA platforms. DAC 2016: 109:1-109:6 - 2014
- [c7]Young Kyu Choi, Jason Cong, Di Wu:
FPGA Implementation of EM Algorithm for 3D CT Reconstruction. FCCM 2014: 157-160 - 2013
- [c6]Young-kyu Choi, In Kyu Park:
Efficient GPU-Based Graph Cuts for Stereo Matching. CVPR Workshops 2013: 642-648 - 2012
- [c5]Young-kyu Choi, Williem, In Kyu Park:
Memory-efficient belief propagation in stereo matching on GPU. APSIPA 2012: 1-4 - [c4]Jie Luo, Kathlene Morales, Byeong Kil Lee, Eugene John, Young Kyu Choi:
Performance-sensitivity and performance-similarity based workload reduction. IPCCC 2012: 21-30 - 2011
- [j5]Kisun You, Young-kyu Choi, Jungwook Choi, Wonyong Sung:
Memory Access Optimized VLSI for 5000-Word Continuous Speech Recognition. J. Signal Process. Syst. 63(1): 95-105 (2011) - 2010
- [j4]Young-kyu Choi, Kisun You, Jungwook Choi, Wonyong Sung:
A Real-Time FPGA-Based 20 000-Word Speech Recognizer With Optimized DRAM Access. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(8): 2119-2131 (2010) - [c3]Young-kyu Choi:
CUDA implementation of belief propagation for stereo vision. ITSC 2010: 1402-1407
2000 – 2009
- 2009
- [c2]Young-kyu Choi, Kisun You, Jungwook Choi, Wonyong Sung:
VLSI for 5000-word continuous speech recognition. ICASSP 2009: 557-560 - 2008
- [c1]Young-kyu Choi, Kisun You, Wonyong Sung:
FPGA-based implementation of a real-time 5000-word continuous speech recognizer. EUSIPCO 2008: 1-5 - 2007
- [j3]Young Kyu Choi, James K. Hahn:
Shrink-Wrapped Isosurface from Cross Sectional Images. IEICE Trans. Inf. Syst. 90-D(12): 2070-2076 (2007)
1990 – 1999
- 1994
- [j2]Dong Su Seong, Young Kyu Choi, Ho Sung Kim, Kyu Ho Park:
An algorithm for optimal isomorphism between two random graphs. Pattern Recognit. Lett. 15(4): 321-327 (1994) - [j1]Young Kyu Choi, Kyu Ho Park:
A heuristic triangulation algorithm for multiple planar contours using an extended double branching procedure. Vis. Comput. 10(7): 372-387 (1994)
Coauthor Index
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