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ORCIDTakashi Mitsuhashi
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2000 – 2009
- 2009
[p1]Tomohiko Takagi, Kazuya Nishimachi, Masayuki Muragishi, Takashi Mitsuhashi, Zengo Furukawa:
Usage Distribution Coverage: What Percentage of Expected Use Has Been Executed in Software Testing? Software Engineering, Artificial Intelligence, Networking and Parallel/Distributed Computing 2009: 57-67- 2002
- [j2]Takashi Mitsuhashi, Toshiro Akino:
Foreword. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 85-A(12): 2567 (2002)
1990 – 1999
- 1998
- [c12]Takeshi Kitahara, Fumihiro Minami, Toshiaki Ueda, Kimiyoshi Usami, Seiichi Nishio, Masami Murakata, Takashi Mitsuhashi:
A Clock-Gating Method for Low-Power LSI Design. ASP-DAC 1998: 307-312 - 1997
- [c11]Masako Murofushi, Takashi Ishioka, Masami Murakata, Takashi Mitsuhashi:
Layout Driven Re-synthesis for Low Power Consumption LSIs. DAC 1997: 666-669 - 1996
- [c10]Takashi Mitsuhashi, Masami Murakata, Kenji Yoshida, Takahiro Aoki:
Physical design CAD in deep sub-micron era. EURO-DAC 1996: 350-355 - [c9]Taku Uchino, Fumihiro Minami, Masami Murakata, Takashi Mitsuhashi:
Switching activity analysis for sequential circuits using Boolean approximation method. ISLPED 1996: 79-84 - 1995
- [c8]T. Aoki, Masami Murakata, Takashi Mitsuhashi, Nobuyuki Goto:
Fanout-tree restructuring algorithm for post-placement timing optimization. ASP-DAC 1995 - [c7]Taku Uchino, Fumihiro Minami, Takashi Mitsuhashi, Nobuyuki Goto:
Switching activity analysis using Boolean approximation method. ICCAD 1995: 20-25 - [c6]M. Tachibana, S. Kurosawa, R. Nojima, Norman Kojima, Masaaki Yamada, Takashi Mitsuhashi, Nobuyuki Goto:
Power and area optimization by reorganizing CMOS complex gate circuits. ISLPD 1995: 155-160 - 1992
- [c5]Takashi Mitsuhashi, Ernest S. Kuh:
Power and Ground Network Topology Optimization for Cell Based VLSIs. DAC 1992: 524-529 - 1990
- [c4]Masako Murofushi, Masaaki Yamada, Takashi Mitsuhashi:
FOLM-Planner: A New Floorplanner with a Frame Overlapping Floorplan Model Suitable for SOG (Sea-of-Gates) Type Gate Arrays. ICCAD 1990: 140-143
1980 – 1989
- 1987
- [j1]Takashi Mitsuhashi, Kenji Yoshida:
A Resistance Calculation Algorithm and Its Application to Circuit Extraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(3): 337-345 (1987) - 1982
- [c3]Makoto Takashima, Takashi Mitsuhashi, Toshiaki Chiba, Kenji Yoshida:
Programs for verifying circuit connectivity of mos/lsi mask artwork. DAC 1982: 544-550 - 1980
- [c2]Takashi Mitsuhashi, Toshiaki Chiba, Makoto Takashima, Kenji Yoshida:
An integrated mask artwork analysis system. DAC 1980: 277-284
1970 – 1979
- 1977
- [c1]Kenji Yoshida, Takashi Mitsuhashi, Yasuo Nakada, Toshiaki Chiba, Kiyoshi Ogita, Shinji Nakatsuka:
A layout checking system for large scale integrated circuits. DAC 1977: 322-330
Coauthor Index
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