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ORCIDBijan Davari
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2010 – 2019
- 2010
[j6]David P. LaPotin, Shahrokh Daijavad, Charles L. Johnson, Steven W. Hunter
, Kazuaki Ishizaki, Hubertus Franke, Heather D. Achilles, Dan P. Dumarot, Nancy A. Greco, Bijan Davari:
Workload and network-optimized computing systems. IBM J. Res. Dev. 54(1): 1 (2010)
2000 – 2009
- 2000
- [j5]Osamu Takahashi, Sang H. Dhong, Manabu Ohkubo, Shohji Onishi, Robert H. Dennard, Robert Hannon, Scott Crowder, Subramanian S. Iyer, Matthew R. Wordeman, Bijan Davari, William B. Weinberger, Naoaki Aoki:
1-GHz fully pipelined 3.7-ns address access time 8 k×1024 embedded synchronous DRAM macro. IEEE J. Solid State Circuits 35(11): 1673-1679 (2000)
1990 – 1999
- 1998
- [j4]Chekib Akrout, John Bialas, Miles G. Canada, Duane Cawthron, James Corr, Bijan Davari, Robert Floyd, Stephen F. Geissler, Ronald Goldblatt, Robert Houle, Paul Kartschoke, Diane Kramer, Pete McCormick, Norman J. Rohrer, Gerard Salem, Ronald Schulz, Lisa Su, Linda Whitney:
A 480-MHz RISC microprocessor in a 0.12-μm Leff CMOS technology with copper interconnects. IEEE J. Solid State Circuits 33(11): 1609-1616 (1998) - 1995
- [j3]Charles W. Koburger III, William F. Clark, James W. Adkisson, Eric Adler, Paul E. Bakeman, Albert S. Bergendahl, Alan B. Botula, W. Chang, Bijan Davari, John H. Givens, Howard H. Hansen, Steven J. Holmes, David V. Horak, Chung Hon Lam, Jerome B. Lasky, Stephen E. Luce, Randy W. Mann, Glen L. Miles, James S. Nakos, Edward J. Nowak, Ghavam G. Shahidi, Yuan Taur, Francis R. White, Matthew R. Wordeman:
A half-micron CMOS logic generation. IBM J. Res. Dev. 39(1-2): 215-228 (1995) - [j2]Ghavam G. Shahidi, James D. Warnock, James Comfort, Stephen E. Fischer, Patricia A. McFarland, Alexandre Acovic, Terry I. Chappell, Barbara A. Chappell, Tak H. Ning, Carl J. Anderson, Robert H. Dennard, J. Y.-C. Sun, Michael R. Polcari, Bijan Davari:
CMOS scaling in the 0.1-µm, 1.X-volt regime for high-performance applications. IBM J. Res. Dev. 39(1-2): 229-244 (1995) - [j1]Bijan Davari, Robert H. Dennard, Ghavam G. Shahidi:
CMOS scaling for high performance and low power-the next ten years. Proc. IEEE 83(4): 595-606 (1995)
Coauthor Index
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