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ORCIDGirish Venkataramani
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Journal Articles
- 2006
[j2]Girish Venkataramani, Tobias Bjerregaard, Tiberiu Chelcea, Seth Copen Goldstein:
Hardware compilation of application-specific memory-access interconnect. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25(5): 756-771 (2006)- 2003
- [j1]Girish Venkataramani, Walid A. Najjar
, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm, Jeffrey Hammes:
Automatic compilation to a coarse-grained reconfigurable system-opn-chip. ACM Trans. Embed. Comput. Syst. 2(4): 560-589 (2003)
Conference and Workshop Papers
- 2014
- [c19]Girish Venkataramani, Yongfeng Gu:
System-Level Retiming and Pipelining. FCCM 2014: 80-87 - 2013
- [c18]Girish Venkataramani, Kiran Kintali, Sudeepa Prakash, Stephan van Beek:
Model-based hardware design. ICCAD 2013: 69-73 - 2009
- [c17]Hari Kannan, Mihai Budiu, John D. Davis, Girish Venkataramani:
Tuning SoCs using the global dynamic critical path. SoCC 2009: 407-411 - 2008
- [c16]Girish Venkataramani, Tiberiu Chelcea, Seth Copen Goldstein:
Heterogeneous Latch-Based Asynchronous Pipelines. ASYNC 2008: 83-92 - [c15]Partha Biswas, Girish Venkataramani:
Comprehensive isomorphic subtree enumeration. CASES 2008: 177-186 - [c14]Girish Venkataramani, Seth Copen Goldstein:
Slack analysis in the system design loop. CODES+ISSS 2008: 231-236 - 2007
- [c13]Tiberiu Chelcea, Girish Venkataramani, Seth Copen Goldstein:
Area Optimizations for Dual-Rail Circuits Using Relative-Timing Analysis. ASYNC 2007: 117-128 - [c12]Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea, Seth Copen Goldstein:
Global Critical Path: A Tool for System-Level Timing Analysis. DAC 2007: 783-786 - [c11]Tiberiu Chelcea, Girish Venkataramani, Seth Copen Goldstein:
Self-Resetting Latches for Asynchronous Micro-Pipelines. DAC 2007: 986-989 - [c10]Girish Venkataramani, Seth Copen Goldstein:
Operation chaining asynchronous pipelined circuits. ICCAD 2007: 442-449 - 2006
- [c9]Mahim Mishra, Timothy J. Callahan, Tiberiu Chelcea, Girish Venkataramani, Seth Copen Goldstein, Mihai Budiu:
Tartan: evaluating spatial computation for whole program execution. ASPLOS 2006: 163-174 - [c8]Joycee Mekie, Supratik Chakraborty, Dinesh K. Sharma, Girish Venkataramani, P. S. Thiagarajan:
Interface Design for Rationally Clocked GALS Systems. ASYNC 2006: 160-171 - [c7]Girish Venkataramani, Seth Copen Goldstein:
Leveraging protocol knowledge in slack matching. ICCAD 2006: 724-729 - 2005
- [c6]Girish Venkataramani, Tiberiu Chelcea, Seth Copen Goldstein, Tobias Bjerregaard:
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs. CODES+ISSS 2005: 231-236 - 2004
- [c5]David Koes, Mihai Budiu, Girish Venkataramani:
Programmer specified pointer independence. Memory System Performance 2004: 51-59 - [c4]Mihai Budiu, Girish Venkataramani, Tiberiu Chelcea, Seth Copen Goldstein:
Spatial computation. ASPLOS 2004: 14-26 - 2003
- [c3]Seth Copen Goldstein, Mihai Budiu, Mahim Mishra, Girish Venkataramani:
Reconfigurable Computing and Electronic Nanotechnology. ASAP 2003: 132- - 2002
- [c2]Girish Venkataramani, Suraj Sudhir, Mihai Budiu, Seth Copen Goldstein:
Factors Influencing the Performance of a CPU-RFU Hybrid Architecture. FPL 2002: 955-965 - 2001
- [c1]Girish Venkataramani, Walid A. Najjar, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm:
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture. CASES 2001: 116-125
Coauthor Index
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