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2020 – today
- 2023
[c30]Naifeng Zhang
, Austin Ebel, Negar Neda, Patrick Brinich, Benedict Reynwar, Andrew G. Schmidt, Mike Franusich, Jeremy Johnson, Brandon Reagen, Franz Franchetti:
Generating High-Performance Number Theoretic Transform Implementations for Vector Architectures. HPEC 2023: 1-7- [c29]Deepraj Soni, Negar Neda, Naifeng Zhang, Benedict Reynwar, Homer Gamil, Benjamin Heyman, Mohammed Nabeel, Ahmad Al Badawi, Yuriy Polyakov, Kellie Canida, Massoud Pedram, Michail Maniatakos, David Bruce Cousins, Franz Franchetti, Matthew French, Andrew G. Schmidt, Brandon Reagen:
RPU: The Ring Processing Unit. ISPASS 2023: 272-282 - [i7]Deepraj Soni, Negar Neda, Naifeng Zhang, Benedict Reynwar, Homer Gamil, Benjamin Heyman, Mohammed Thari Nabeel, Ahmad Al Badawi, Yuriy Polyakov, Kellie Canida, Massoud Pedram, Michail Maniatakos, David Bruce Cousins, Franz Franchetti, Matthew French, Andrew G. Schmidt, Brandon Reagen:
RPU: The Ring Processing Unit. CoRR abs/2303.17118 (2023) - [i6]David Bruce Cousins, Yuriy Polyakov, Ahmad Al Badawi, Matthew French, Andrew G. Schmidt, Ajey P. Jacob, Benedict Reynwar, Kellie Canida, Akhilesh R. Jaiswal, Clynn Mathew, Homer Gamil, Negar Neda, Deepraj Soni, Michail Maniatakos, Brandon Reagen, Naifeng Zhang, Franz Franchetti, Patrick Brinich, Jeremy Johnson, Patrick Broderick, Mike Franusich, Bo Zhang, Zeming Cheng, Massoud Pedram:
TREBUCHET: Fully Homomorphic Encryption Accelerator for Deep Computation. CoRR abs/2304.05237 (2023) - [i5]Deepraj Soni, Negar Neda, Naifeng Zhang, Benedict Reynwar, Homer Gamil, Benjamin Heyman, Mohammed Thari Nabeel, Ahmad Al Badawi, Yuriy Polyakov, Kellie Canida, Massoud Pedram, Michail Maniatakos, David Bruce Cousins, Franz Franchetti, Matthew French, Andrew G. Schmidt, Brandon Reagen:
RPU: The Ring Processing Unit. IACR Cryptol. ePrint Arch. 2023: 465 (2023) - [i4]David Bruce Cousins, Yuriy Polyakov, Ahmad Al Badawi, Matthew French, Andrew G. Schmidt, Ajey P. Jacob, Benedict Reynwar, Kellie Canida, Akhilesh R. Jaiswal, Clynn Mathew, Homer Gamil, Negar Neda, Deepraj Soni, Michail Maniatakos, Brandon Reagen, Naifeng Zhang, Franz Franchetti, Patrick Brinich, Jeremy Johnson, Patrick Broderick, Mike Franusich, Bo Zhang, Zeming Cheng, Massoud Pedram:
TREBUCHET: Fully Homomorphic Encryption Accelerator for Deep Computation. IACR Cryptol. ePrint Arch. 2023: 521 (2023) - 2022
- [c28]Gourav Datta, Souvik Kundu, Zihan Yin, Joe Mathai, Zeyu Liu, Zixu Wang, Mulin Tian, Shunlin Lu, Ravi Teja Lakkireddy, Andrew G. Schmidt, Wael Abd-Almageed, Ajey P. Jacob, Akhilesh R. Jaiswal, Peter A. Beerel:
P2M-DeTrack: Processing-in-Pixel-in-Memory for Energy-efficient and Real-Time Multi-Object Detection and Tracking. VLSI-SoC 2022: 1-6 - 2020
- [c27]Ian D. Taras, Andrew G. Schmidt:
FPGA Virtualization for Deprecated Devices. FCCM 2020: 219 - [c26]Matthew French, Marco Paolieri, Vivek V. Menon, Andrew G. Schmidt:
Emulating and Verifying Sensing, Computation, and Communication in Distributed Remote Sensing Systems. IGARSS 2020: 3849-3852
2010 – 2019
- 2019
- [c25]Andrew G. Schmidt, Vivek Venugopalan, Marco Paolieri, Matthew French:
Constellations in the Cloud: Virtualizing Remote Sensing Systems. IGARSS 2019: 5351-5354 - [c24]Yinghua Hu, Vivek V. Menon, Andrew G. Schmidt, Joshua S. Monson, Matthew French, Pierluigi Nuzzo:
Security-driven metrics and models for efficient evaluation of logic encryption schemes. MEMOCODE 2019: 9:1-9:5 - [c23]Abhi D. Rajagopala, Ron Sass, Andrew G. Schmidt:
Volcan: System Integration of HLS and HMC on FPGAs. ReConFig 2019: 1-2 - [c22]Vivek V. Menon, Gaurav Kolhe, Andrew G. Schmidt, Joshua S. Monson, Matthew French, Yinghua Hu, Peter A. Beerel, Pierluigi Nuzzo:
System-Level Framework for Logic Obfuscation with Quantified Metrics for Evaluation. SecDev 2019: 89-100 - [i3]Yinghua Hu, Vivek V. Menon, Andrew G. Schmidt, Joshua S. Monson, Matthew French, Pierluigi Nuzzo:
Toward Efficient Evaluation of Logic Encryption Schemes: Models and Metrics. CoRR abs/1909.07917 (2019) - 2018
- [c21]Sam Skalicky, Joshua S. Monson, Andrew G. Schmidt, Matthew French:
Hot & Spicy: Improving Productivity with Python and HLS for FPGAs. FCCM 2018: 85-92 - [c20]Abhi D. Rajagopala, Ron Sass, Andrew G. Schmidt, Matthew French:
Bridging the Gap between Advanced Memory and Heterogeneous Architectures. FCCM 2018: 226 - 2017
- [c19]Andrew G. Schmidt, Gabriel Weisz, Matthew French:
Evaluating Rapid Application Development with Python for Heterogeneous Processor-Based FPGAs. FCCM 2017: 121-124 - [i2]Andrew G. Schmidt, Gabriel Weisz, Matthew French:
Evaluating Rapid Application Development with Python for Heterogeneous Processor-based FPGAs. CoRR abs/1705.05209 (2017) - 2015
- [c18]Sam Skalicky, Andrew G. Schmidt, Sonia López, Matthew French:
A unified hardware/software MPSoC system construction and run-time framework. DATE 2015: 301-304 - [c17]Sam Skalicky, Sonia López, Marcin Lukowiak, Andrew G. Schmidt:
A Parallelizing Matlab Compiler Framework and Run Time for Heterogeneous Systems. HPCC/CSS/ICESS 2015: 232-237 - 2014
- [i1]Sam Skalicky, Andrew G. Schmidt, Matthew French:
High Level Hardware/Software Embedded System Design with Redsharc. CoRR abs/1408.4725 (2014) - 2013
- [c16]Andrew G. Schmidt, Matthew French:
Fast lossless image compression with Radiation Hardening by hardware/software co-design on platform FPGAs. ASAP 2013: 103-106 - 2012
- [j5]Andrew G. Schmidt, Neil Steiner, Matthew French, Ron Sass:
HwPMI: An Extensible Performance Monitoring Infrastructure for Improving Hardware Design and Productivity on FPGAs. Int. J. Reconfigurable Comput. 2012: 162404:1-162404:12 (2012) - [j4]Andrew G. Schmidt, William V. Kritikos, Shanyuan Gao, Ron Sass:
An Evaluation of an Integrated On-Chip/Off-Chip Network for High-Performance Reconfigurable Computing. Int. J. Reconfigurable Comput. 2012: 564704:1-564704:15 (2012) - [j3]William V. Kritikos, Andrew G. Schmidt, Ron Sass, Erik K. Anderson, Matthew French:
Redsharc: A Programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip. Int. J. Reconfigurable Comput. 2012: 872610:1-872610:11 (2012) - [j2]Andrew G. Schmidt, Siddhartha Datta, Ashwin A. Mendon, Ron Sass:
Investigation into scaling I/O bound streaming applications productively with an all-FPGA cluster. Parallel Comput. 38(8): 344-364 (2012) - 2011
- [c15]Andrew G. Schmidt, Bin Huang, Ron Sass, Matthew French:
Checkpoint/Restart and Beyond: Resilient High Performance Computing with FPGAs. FCCM 2011: 162-169 - [c14]William V. Kritikos, Yamuna Rajasekhar, Andrew G. Schmidt, Ron Sass:
A Radix Tree Router for Scalable FPGA Networks. FPL 2011: 76-81 - [c13]Ron Sass, Andrew G. Schmidt, Scott Buscemi:
Reconfigurable Computing Cluster - A Five-Year Perspective of the Project. PARCO 2011: 595-602 - [c12]Andrew G. Schmidt, Ron Sass:
Improving FPGA Design and Evaluation Productivity with a Hardware Performance Monitoring Infrastructure. ReConFig 2011: 422-427 - 2010
- [c11]Shanyuan Gao, Andrew G. Schmidt, Ron Sass:
Impact of reconfigurable hardware on accelerating MPI_Reduce. FPT 2010: 29-36 - [c10]Andrew G. Schmidt, William V. Kritikos, Ron Sass, Erik K. Anderson, Matthew French:
Merging Programming Models and On-chip Networks to Meet the Programmable and Performance Needs of Multi-core Systems on a Programmable Chip. ReConFig 2010: 334-339 - [c9]Bin Huang, Andrew G. Schmidt, Ashwin A. Mendon, Ron Sass:
Investigating resilient high performance reconfigurable computing with minimally-invasive system monitoring. HPRCTA@SC 2010: 1-8
2000 – 2009
- 2009
- [j1]Ashwin A. Mendon, Andrew G. Schmidt, Ron Sass:
A Hardware Filesystem Implementation with Multidisk Support. Int. J. Reconfigurable Comput. 2009: 572860:1-572860:13 (2009) - [c8]Andrew G. Schmidt, William V. Kritikos, Rahul R. Sharma, Ron Sass:
AIREN: A Novel Integration of On-Chip and Off-Chip FPGA Networks. FCCM 2009: 271-274 - [c7]Shanyuan Gao, Andrew G. Schmidt, Ron Sass:
Hardware implementation of MPI_Barrier on an FPGA cluster. FPL 2009: 12-17 - 2008
- [c6]Yamuna Rajasekhar, Yashodhan Phatak, Andrew G. Schmidt, William V. Kritikos, Ron Sass:
FPGA Session Control (FSC): Providing Remote Access to a Cluster of FPGAs. FCCM 2008: 298-299 - [c5]Andrew G. Schmidt, William V. Kritikos, Siddhartha Datta, Ron Sass:
Reconfigurable Computing Cluster Project: Phase I Brief. FCCM 2008: 300-301 - [c4]Yamuna Rajasekhar, William V. Kritikos, Andrew G. Schmidt, Ron Sass:
Teaching FPGA system design via a remote laboratory facility. FPL 2008: 687-690 - 2007
- [c3]Ron Sass, William V. Kritikos, Andrew G. Schmidt, Srinivas Beeravolu, Parag Beeraka:
Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing. FCCM 2007: 127-140 - [c2]Andrew G. Schmidt, Ron Sass:
Quantifying Effective Memory Bandwidth of Platform FPGAs. FCCM 2007: 337-338 - [c1]Andrew G. Schmidt, Ron Sass:
Characterizing Effective Memory Bandwidth of Designs with Concurrent High-Performance Computing Cores. FPL 2007: 601-604
Coauthor Index
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