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Ettore Amirante
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2000 – 2009
- 2009
- [c8]Stefan Drapatz, Thomas Fischer, Karl Hofmann, Ettore Amirante, Peter Huber, Martin Ostermayr, Georg Georgakos, Doris Schmitt-Landsiedel:
Fast stability analysis of large-scale SRAM arrays and the impact of NBTI degradation. ESSCIRC 2009: 92-95 - 2005
- [c7]Stephan Henzler, Thomas Nirschl, Matthias Eireiner, Ettore Amirante, Doris Schmitt-Landsiedel:
Making adiabatic circuits attractive for todays VLSI industry by multi-mode operation-adiabatic mode circuits. Conf. Computing Frontiers 2005: 414-420 - [c6]Jürgen Fischer, Ettore Amirante, Thomas Nirschl, Philip Teichmann, Stephan Henzler, Doris Schmitt-Landsiedel:
Impact of process parameter variations on the energy dissipation in adiabatic logic. ECCTD 2005: 429-432 - [c5]Jürgen Fischer, Philip Teichmann, Ettore Amirante, Doris Schmitt-Landsiedel:
Energieoptimierung durch Adiabatische Schaltungstechnik. GI Jahrestagung (1) 2005: 446 - [c4]Philip Teichmann, Jürgen Fischer, Stephan Henzler, Ettore Amirante, Doris Schmitt-Landsiedel:
Power-Clock Gating in Adiabatic Logic Circuits. PATMOS 2005: 638-646 - 2004
- [c3]Jürgen Fischer, Ettore Amirante, Agnese Bargagli-Stoffi, Philip Teichmann, Dominik Gruber, Doris Schmitt-Landsiedel:
Power Supply Net for Adiabatic Circuits. PATMOS 2004: 413-422 - 2003
- [c2]Ettore Amirante, Jürgen Fischer, Markus Lang, Agnese Bargagli-Stoffi, Jörg Berthold, Christoph Heer, Doris Schmitt-Landsiedel:
An ultra low-power adiabatic adder embedded in a standard 0.13μm CMOS environment. ESSCIRC 2003: 599-602 - [c1]Jürgen Fischer, Ettore Amirante, Francesco Randazzo, Giuseppe Iannaccone, Doris Schmitt-Landsiedel:
Reduction of the Energy Consumption in Adiabatic Gates by Optimal Transistor Sizing. PATMOS 2003: 309-318 - 2001
- [j1]Ettore Amirante, Giuseppe Iannaccone, B. Pellegrini:
Three-dimensional Statistical Modeling of the Effects of the Random Distribution of Dopants in Deep Sub-micron nMOSFETs. VLSI Design 13(1-4): 425-429 (2001)
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