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Yean-Kuen Fang
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2010 – 2019
- 2014
- [j7]Cheng-I Lin, Yean-Kuen Fang, Wei-Chao Chang, Mao-Wei Chiou, Chih-Wei Chen:
Effect of gate barrier and channel buffer layer on electric properties and transparence of the a-IGZO thin film transistor. Microelectron. Reliab. 54(5): 905-910 (2014) - 2012
- [j6]Feng-Renn Juang, Yean-Kuen Fang, Hung-Yu Chiu:
Dependence of the Au/SnOx/n-LTPS/glass thin film MOS Schottky diode CO gas sensing performances on operating temperature. Microelectron. Reliab. 52(2): 425-429 (2012) - [j5]Yong-Shiuan Tsair, Yean-Kuen Fang, Feng-Renn Juang, Yu-Hsiung Wang, Wen-Ting Chu, Yung-Tao Lin, Luan Tran:
A novel method to improve cell endurance window in source-side injection split gate flash memory. Microelectron. Reliab. 52(6): 1055-1059 (2012) - 2010
- [j4]Chia-Wei Hsu, Yean-Kuen Fang, Wen-Kuan Yeh, Chun-Yu Chen, Yen-Ting Chiang, Feng-Renn Juang, Chien-Ting Lin, Chieh-Ming Lai:
Improvement of TDDB reliability, characteristics of HfO2 high-k/metal gate MOSFET device with oxygen post deposition annealing. Microelectron. Reliab. 50(5): 618-621 (2010)
2000 – 2009
- 2008
- [j3]Yen-Ting Chiang, Yean-Kuen Fang, Y. J. Huang, Tse-Heng Chou, S. Y. Yeh, C. S. Lin:
Effect of the pre-gate oxide cleaning temperature on the reliability of GOI and devices performances in deep submicron CMOS technology. Microelectron. Reliab. 48(11-12): 1786-1790 (2008) - [j2]Chia-Wei Hsu, Yean-Kuen Fang, Wen-Kuan Yeh, Chien-Ting Lin:
Significantly improving sub-90 nm CMOSFET performances with notch-gate enhanced high tensile-stress contact etch stop layer. Microelectron. Reliab. 48(11-12): 1791-1794 (2008) - 2007
- [j1]Chieh-Ming Lai, Yean-Kuen Fang, Chien-Ting Lin, Chia-Wei Hsu, Wen-Kuan Yeh:
The impacts of high tensile stress CESL and geometry design on device performance and reliability for 90 nm SOI nMOSFETs. Microelectron. Reliab. 47(6): 944-952 (2007) - 2002
- [c1]Chung-Hui Chen, Yean-Kuen Fang, Chien-Chun Tsai, Shen Tu, Mark K. L. Chen, Mi-Chang Chang:
High voltage tolerant ESD design for analog applications in deep submicron CMOS technologies. CICC 2002: 89-92
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