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Wenbo Liu 0003
Person information
- affiliation: Broadcom Corporation, Irvine, CA, USA
Other persons with the same name
- Wenbo Liu — disambiguation page
- Wenbo Liu 0001
— Nanjing University of Aeronautics and Astronautics, Nanjing, China
- Wenbo Liu 0002 — Carnegie Mellon University, Pittsburgh, USA
- Wenbo Liu 0004
— Changchun University of Technology, Changchun, China
- Wenbo Liu 0005
— Northwestern Polytechnical University, Xi'an, China
- Wenbo Liu 0006
— Southwest Jiaotong University, Chengdu, China
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2010 – 2019
- 2012
- [j3]Wenbo Liu, Yun Chiu
:
Time-Interleaved Analog-to-Digital Conversion With Online Adaptive Equalization. IEEE Trans. Circuits Syst. I Regul. Pap. 59-I(7): 1384-1395 (2012) - [c4]Wenbo Liu, Pingli Huang, Yun Chiu
:
A 12-bit 50-MS/s 3.3-mW SAR ADC with background digital calibration. CICC 2012: 1-4 - 2011
- [j2]Pingli Huang, Szukang Hsien, Victor Lu, Peiyuan Wan, Seung-Chul Lee, Wenbo Liu, Bo-Wei Chen, Yung-Pin Lee, Wen-Tsao Chen, Tzu-Yi Yang, Gin-Kou Ma, Yun Chiu
:
SHA-Less Pipelined ADC With In Situ Background Clock-Skew Calibration. IEEE J. Solid State Circuits 46(8): 1893-1903 (2011) - [j1]Wenbo Liu, Pingli Huang, Yun Chiu
:
A 12-bit, 45-MS/s, 3-mW Redundant Successive-Approximation-Register Analog-to-Digital Converter With Digital Calibration. IEEE J. Solid State Circuits 46(11): 2661-2672 (2011) - 2010
- [b1]Wenbo Liu:
Low-power high-performance SAR ADC design with digital calibration techniques. University of Illinois Urbana-Champaign, USA, 2010 - [c3]Pingli Huang, Szukang Hsien, Victor Lu, Peiyuan Wan, Seung-Chul Lee, Wenbo Liu, Bo-Wei Chen, Yung-Pin Lee, Wen-Tsao Chen, Tzu-Yi Yang, Gin-Kou Ma, Yun Chiu:
SHA-less pipelined ADC converting 10th Nyquist band with in-situ clock-skew calibration. CICC 2010: 1-4 - [c2]Wenbo Liu, Pingli Huang, Yun Chiu
:
A 12b 22.5/45MS/s 3.0mW 0.059mm2 CMOS SAR ADC achieving over 90dB SFDR. ISSCC 2010: 380-381
2000 – 2009
- 2009
- [c1]Wenbo Liu, Yuchun Chang, Szukang Hsien, Bo-Wei Chen, Yung-Pin Lee, Wen-Tsao Chen, Tzu-Yi Yang, Gin-Kou Ma, Yun Chiu
:
A 600MS/s 30mW 0.13µm CMOS ADC array achieving over 60dB SFDR with adaptive digital equalization. ISSCC 2009: 82-83
Coauthor Index
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