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Donald A. Joy

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1990 – 1999

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1993
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Donald A. Joy, Maciej J. Ciesielski:
Clock period minimization with wave pipelining. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12(4): 461-472 (1993)
1992
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Donald A. Joy, Maciej J. Ciesielski:
Layer assignment for printed circuit boards and integrated circuits. Proc. IEEE 80(2): 311-331 (1992)
1991
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Donald A. Joy, Maciej J. Ciesielski:
Placement for Clock Period Minimization With Multiple Wave Propagation. DAC 1991: 640-643

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