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ORCIDAtanu Chattopadhyay
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2020 – today
- 2021
[j4]Prasenjit Mukherjee, Atanu Chattopadhyay, Baisakhi Chakraborty
, Debashis Nandi:
Natural language query handling using extended knowledge provider system. Int. J. Knowl. Based Intell. Eng. Syst. 25(1): 1-19 (2021)
2010 – 2019
- 2019
- [j3]Kailash Pati Mandal, Prasenjit Mukherjee, Baisakhi Chakraborty, Atanu Chattopadhyay:
A novel Bengali Language Query Processing System (BLQPS) in medical domain. Intell. Decis. Technol. 13(2): 177-192 (2019) - 2012
- [j2]Atanu Chattopadhyay, Zeljko Zilic:
Flexible and Reconfigurable Mismatch-Tolerant Serial Clock Distribution Networks. IEEE Trans. Very Large Scale Integr. Syst. 20(3): 523-536 (2012)
2000 – 2009
- 2009
- [c6]Atanu Chattopadhyay, Zeljko Zilic:
Serial reconfigurable mismatch-tolerant clock distribution. DAC 2009: 611-612 - 2008
- [c5]Atanu Chattopadhyay, Zeljko Zilic:
Built-in Clock Skew System for On-line Debug and Repair. DATE 2008: 248-251 - 2007
- [c4]Atanu Chattopadhyay, Zeljko Zilic:
Reconfigurable Clock Distribution Circuitry. ISCAS 2007: 877-880 - 2005
- [j1]Atanu Chattopadhyay, Zeljko Zilic:
GALDS: a complete framework for designing multiclock ASICs and SoCs. IEEE Trans. Very Large Scale Integr. Syst. 13(6): 641-654 (2005) - [c3]Jean-Samuel Chenard, Ahmed Usman Khalid, Milos Prokic, Rong Zhang, K.-L. Lim, Atanu Chattopadhyay, Zeljko Zilic:
Expandable and Robust Laboratory for Microprocessor Systems. MSE 2005: 65-66 - 2003
- [c2]Atanu Chattopadhyay, Zeljko Zilic:
A globally asynchronous locally dynamic system for ASICs and SoCs. ACM Great Lakes Symposium on VLSI 2003: 176-181 - 2002
- [c1]Atanu Chattopadhyay, Zeljko Zilic:
High speed asynchronous structures for inter-clock domain communication. ICECS 2002: 517-520
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