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E-Hung Chen
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Journal Articles
- 2015
- [j7]Reza Navid, E-Hung Chen, Masum Hossain, Brian S. Leibowitz, Jihong Ren, Chuen-Huei Adam Chou, Barry Daly, Marko Aleksic, Bruce Su, Simon Li, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble:
A 40 Gb/s Serial Link Transceiver in 28 nm CMOS Technology. IEEE J. Solid State Circuits 50(4): 814-827 (2015) - 2013
- [j6]Seuk Son, Hanseok Kim, Myeong-Jae Park, Kyung-Hoon Kim, E-Hung Chen, Brian S. Leibowitz, Jaeha Kim:
A 2.3-mW, 5-Gb/s Low-Power Decision-Feedback Equalizer Receiver Front-End and its Two-Step, Minimum Bit-Error-Rate Adaptation Algorithm. IEEE J. Solid State Circuits 48(11): 2693-2704 (2013) - 2012
- [j5]E-Hung Chen, Ramy Yousry, Chih-Kong Ken Yang:
Power Optimized ADC-Based Serial Link Receiver. IEEE J. Solid State Circuits 47(4): 938-951 (2012) - 2011
- [j4]Jaeha Kim, E-Hung Chen, Jihong Ren, Brian S. Leibowitz, Patrick Satarzadeh, Jared Zerbe, Chih-Kong Ken Yang:
Equalizer Design and Performance Trade-Offs in ADC-Based Serial Links. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(9): 2096-2107 (2011) - 2010
- [j3]E-Hung Chen, Chih-Kong Ken Yang:
ADC-Based Serial I/O Receivers. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2248-2258 (2010) - 2008
- [j2]E-Hung Chen, Jihong Ren, Brian S. Leibowitz, Hae-Chang Lee, Qi Lin, Kyung Suk Oh, Frank Lambrecht, Vladimir Stojanovic
, Jared Zerbe, Chih-Kong Ken Yang:
Near-Optimal Equalizer and Timing Adaptation for I/O Links Using a BER-Based Metric. IEEE J. Solid State Circuits 43(9): 2144-2156 (2008) - [j1]Jackie Koon Lun Wong, E-Hung Chen, Chih-Kong Ken Yang:
Edge and Data Adaptive Equalization of Serial-Link Transceivers. IEEE J. Solid State Circuits 43(9): 2157-2169 (2008)
Conference and Workshop Papers
- 2014
- [c5]E-Hung Chen, Masum Hossain, Brian S. Leibowitz, Reza Navid, Jihong Ren, Chuen-Huei Adam Chou, Barry Daly, Marko Aleksic, Bruce Su, Simon Li, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble:
A 40-Gb/s serial link transceiver in 28-nm CMOS technology. VLSIC 2014: 1-2 - [c4]Masum Hossain, E-Hung Chen, Reza Navid, Brian S. Leibowitz, Chuen-Huei Adam Chou, Simon Li, Myeong-Jae Park, Jihong Ren, Barry Daly, Bruce Su, Makarand Shirasgaonkar, Fred Heaton, Jared Zerbe, John C. Eble:
A 4×40 Gb/s quad-lane CDR with shared frequency tracking and data dependent jitter filtering. VLSIC 2014: 1-2 - 2013
- [c3]Ramy Yousry, Henry Park, E-Hung Chen, Chih-Kong Ken Yang:
A digitally-calibrated 10GS/s reconfigurable flash ADC in 65-nm CMOS. ISCAS 2013: 2443-2447 - 2012
- [c2]Tamer A. Ali, Won Ho Park, Preeti Mulage, E-Hung Chen, Ron Ho, Chih-Kong Ken Yang:
A 100+ meter 12Gb/s/lane copper cable link based on clock-forwarding. VLSIC 2012: 108-109 - 2009
- [c1]Chih-Kong Ken Yang, E-Hung Chen:
ADC-based serial I/O receivers. CICC 2009: 323-330
Coauthor Index
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