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Cho-Ying Lu
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Journal Articles
- 2010
- [j2]Cho-Ying Lu, Jose Fabian Silva-Rivas, Praveena Kode, José Silva-Martínez, Sebastian Hoyos:
A Sixth-Order 200 MHz IF Bandpass Sigma-Delta Modulator With Over 68 dB SNDR in 10 MHz Bandwidth. IEEE J. Solid State Circuits 45(6): 1122-1136 (2010) - [j1]Cho-Ying Lu, Marvin Onabajo, Venkata Gadde, Yung-Chung Lo, Hsien-Pu Chen, Vijayaramalingam Periasamy, José Silva-Martínez:
A 25 MHz Bandwidth 5th-Order Continuous-Time Low-Pass Sigma-Delta Modulator With 67.7 dB SNDR Using Time-Domain Quantization and Feedback. IEEE J. Solid State Circuits 45(9): 1795-1808 (2010)
Conference and Workshop Papers
- 2021
- [c3]Thomas William Brown, Georgios C. Dogiamis
, Yi-Shin Yeh, Diego Correas-Serrano, Triveni S. Rane, Surej Ravikumar, Jessica C. Chou, Vijaya B. Neeli, Jose Mauricio Marulanda, Neelam Prabhu Gaunkar, Cho-Ying Lu, Iwen Huang, Ram Sadhwani, Hyung-Jin Lee, Hariprasad Chandrakumar, Jeffery W. Bates, Zinia Tuli, Qiang Yu, Mario Weiss, Jag Rangaswamy, Carlos F. Nieva, Dimitri Frolov, Telesphor Kamgaing, Ye Seul Nam, Henning Braunisch, Said Rami:
A 50 Gbps 134 GHz 16 QAM 3 m Dielectric Waveguide Transceiver System Implemented in 22nm CMOS. VLSI Circuits 2021: 1-2 - 2018
- [c2]Cho-Ying Lu, Surej Ravikumar, Amruta D. Sali, Matthias Eberlein
, Hyung-Jin Lee:
An 8b subthreshold hybrid thermal sensor with ±1.07°C inaccuracy and single-element remote-sensing technique in 22nm FinFET. ISSCC 2018: 318-320 - 2015
- [c1]Chun C. Lee, Cho-Ying Lu, Ramya Narayanaswamy, Jad B. Rizk:
A 12b 70MS/s SAR ADC with digital startup calibration in 14nm CMOS. VLSIC 2015: 62-
Coauthor Index
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