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ORCIDSimranjeet Singh
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2020 – today
- 2024
[j2]Chandan Kumar Jha
, Khushboo Qayyum, Kemal Çaglar Coskun, Simranjeet Singh, Muhammad Hassan, Rainer Leupers, Farhad Merchant, Rolf Drechsler:
veriSIMPLER: An Automated Formal Verification Methodology for SIMPLER MAGIC Design Style Based In-Memory Computing. IEEE Trans. Circuits Syst. I Regul. Pap. 71(9): 4169-4179 (2024)- [c18]Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant:
MemSPICE: Automated Simulation and Energy Estimation Framework for MAGIC-Based Logic-in-Memory. ASPDAC 2024: 282-287 - [c17]Luca Parrini, Taha Soliman, Benjamin Hettwer, Jan Micha Borrmann, Simranjeet Singh, Ankit Bende, Vikas Rana, Farhad Merchant, Norbert Wehn:
Error Detection and Correction Codes for Safe In-Memory Computations. ETS 2024: 1-4 - [c16]Gokulnath Rajendran, Furqan Zahoor, Sidhaant Sachin Thakker, Simranjeet Singh, Farhad Merchant, Vikas Rana, Anupam Chattopadhyay:
Harnessing Entropy: RRAM Crossbar-based Unified PUF and RNG. VLSID 2024: 560-564 - [c15]Ankit Bende, Simranjeet Singh, Chandan Kumar Jha, Tim Kempen, Felix Cüppers, Christopher Bengel, Andre Zambanini, Dennis Nielinger, Sachin B. Patkar, Rolf Drechsler, Rainer Waser, Farhad Merchant, Vikas Rana:
Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array. VLSID 2024: 565-570 - [i12]Luca Parrini, Taha Soliman, Benjamin Hettwer, Jan Micha Borrmann, Simranjeet Singh, Ankit Bende, Vikas Rana, Farhad Merchant, Norbert Wehn:
Error Detection and Correction Codes for Safe In-Memory Computations. CoRR abs/2404.09818 (2024) - [i11]Simranjeet Singh, Ankit Bende, Chandan Kumar Jha, Vikas Rana, Rolf Drechsler, Sachin B. Patkar, Farhad Merchant:
In-Memory Mirroring: Cloning Without Reading. CoRR abs/2407.02921 (2024) - [i10]Simranjeet Singh, Farhad Merchant, Sachin B. Patkar:
Resistive Memory for Computing and Security: Algorithms, Architectures, and Platforms. CoRR abs/2407.03843 (2024) - 2023
- [j1]Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Phrangboklang Lyngton Thangkhiew, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant:
Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design Style. IEEE Embed. Syst. Lett. 15(4): 230-233 (2023) - [c14]Ritwik Mishra, Simranjeet Singh, Jasmeet Kaur, Pushpendra Singh, Rajiv Ratn Shah:
Hindi Chatbot for Supporting Maternal and Child Health Related Queries in Rural India. ClinicalNLP@ACL 2023: 69-77 - [c13]Simranjeet Singh, Furqan Zahoor, Gokulnath Rajendran, Sachin B. Patkar, Anupam Chattopadhyay, Farhad Merchant:
Hardware Security Primitives Using Passive RRAM Crossbar Array: Novel TRNG and PUF Designs. ASP-DAC 2023: 449-454 - [c12]Simranjeet Singh, Varun Kumar, Subhasis Bhattacharjee:
An Integrated Approach to Point Labeling Problem. ICCCNT 2023: 1-6 - [c11]Ritwik Mishra, Simranjeet Singh, Rajiv Ratn Shah, Ponnurangam Kumaraguru, Pushpak Bhattacharyya:
IndIE: A Multilingual Open Information Extraction Tool For Indic Languages. IJCNLP (Findings) 2023: 312-326 - [c10]Omar Ghazal, Simranjeet Singh, Tousif Rahman, Shengqi Yu, Yujin Zheng, Domenico Balsamo, Sachin B. Patkar, Farhad Merchant, Fei Xia, Alex Yakovlev, Rishad A. Shafik:
IMBUE: In-Memory Boolean-to-CUrrent Inference ArchitecturE for Tsetlin Machines. ISLPED 2023: 1-6 - [c9]Simranjeet Singh, Elmira Moussavi, Christopher Bengel, Sachin B. Patkar, Rainer Waser, Rainer Leupers, Vikas Rana, Vivek Pachauri, Stephan Menzel, Farhad Merchant:
Exploring Multi-Valued Logic and its Application in Emerging Post-CMOS Technologies. NANOARCH 2023: 30:1-30:7 - [c8]Simranjeet Singh, Omar Ghazal, Chandan Kumar Jha, Vikas Rana, Rolf Drechsler, Rishad A. Shafik, Alex Yakovlev, Sachin B. Patkar, Farhad Merchant:
Finite State Automata Design using 1T1R ReRAM Crossbar. NEWCAS 2023: 1-5 - [c7]Simranjeet Singh, Furqan Zahoor, Gokulnath Rajendran, Vikas Rana, Sachin B. Patkar, Anupam Chattopadhyay, Farhad Merchant:
Integrated Architecture for Neural Networks and Security Primitives using RRAM Crossbar. NEWCAS 2023: 1-5 - [c6]Gokulnath Rajendran, Furqan Zahoor, Simranjeet Singh, Farhad Merchant, Vikas Rana, Anupam Chattopadhyay:
PR-PUF: A Reconfigurable Strong RRAM PUF. VLSI-SoC 2023: 1-6 - [i9]Simranjeet Singh, Furqan Zahoor, Gokulnath Rajendran, Vikas Rana, Sachin B. Patkar, Anupam Chattopadhyay, Farhad Merchant:
Integrated Architecture for Neural Networks and Security Primitives using RRAM Crossbar. CoRR abs/2304.13531 (2023) - [i8]Simranjeet Singh, Omar Ghazal, Chandan Kumar Jha, Vikas Rana, Rolf Drechsler, Rishad A. Shafik, Alex Yakovlev, Sachin B. Patkar, Farhad Merchant:
Finite State Automata Design using 1T1R ReRAM Crossbar. CoRR abs/2304.13552 (2023) - [i7]Omar Ghazal, Simranjeet Singh, Tousif Rahman, Shengqi Yu, Yujin Zheng, Domenico Balsamo, Sachin B. Patkar, Farhad Merchant, Fei Xia, Alex Yakovlev, Rishad A. Shafik:
IMBUE: In-Memory Boolean-to-CUrrent Inference ArchitecturE for Tsetlin Machines. CoRR abs/2305.12914 (2023) - [i6]Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Phrangboklang Lyngton Thangkhiew, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant:
Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design Style. CoRR abs/2307.03669 (2023) - [i5]Simranjeet Singh, Chandan Kumar Jha, Ankit Bende, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant:
MemSPICE: Automated Simulation and Energy Estimation Framework for MAGIC-Based Logic-in-Memory. CoRR abs/2309.04868 (2023) - [i4]Ankit Bende, Simranjeet Singh, Chandan Kumar Jha, Tim Kempen, Felix Cüppers, Christopher Bengel, Andre Zambanini, Dennis Nielinger, Sachin B. Patkar, Rolf Drechsler, Rainer Waser, Farhad Merchant, Vikas Rana:
Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array. CoRR abs/2310.10460 (2023) - 2022
- [c5]Soofiyan Atar, Simranjeet Singh, Jaison Jose, Kavi Arya:
P2Ag: Perception Pipeline in Agriculture for Robotic Harvesting of Tomatoes. ICAART (3) 2022: 121-129 - [c4]Soofiyan Atar, Simranjeet Singh, Srijan Agrawal, Ravikumar Chaurasia, Shreyas Sule, Sravya Gadamsetty, Aditya Panwar, Amit Kumar, Kavi Arya:
LCPP: Low Computational Processing Pipeline for Delivery Robots. ICAART (3) 2022: 130-138 - [c3]Simranjeet Singh, Srinivasu Bodapati, Sachin B. Patkar, Rainer Leupers, Anupam Chattopadhyay, Farhad Merchant:
PA-PUF: A Novel Priority Arbiter PUF. VLSI-SoC 2022: 1-6 - [i3]Simranjeet Singh, Srinivasu Bodapati, Sachin B. Patkar, Rainer Leupers, Anupam Chattopadhyay, Farhad Merchant:
PA-PUF: A Novel Priority Arbiter PUF. CoRR abs/2207.10526 (2022) - [i2]Simranjeet Singh, Furqan Zahoor, Gokulnath Rajendran, Sachin B. Patkar, Anupam Chattopadhyay, Farhad Merchant:
Hardware Security Primitives using Passive RRAM Crossbar Array: Novel TRNG and PUF Designs. CoRR abs/2211.03526 (2022) - 2020
- [c2]Simranjeet Singh, Rajneesh Sharma, Alan F. Smeaton:
Using GANs to Synthesise Minimum Training Data for Deepfake Generation. AICS 2020: 193-204 - [c1]Yashwant Temburu, Mandar Datar, Simranjeet Singh, Vaibhav Malviya, Sachin B. Patkar:
Real time System Implementation for Stereo 3D Mapping and Visual Odometry. IPAS 2020: 7-13 - [i1]Simranjeet Singh, Rajneesh Sharma, Alan F. Smeaton:
Using GANs to Synthesise Minimum Training Data for Deepfake Generation. CoRR abs/2011.05421 (2020)
Coauthor Index
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