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ORCIDSherif A. Tawfik
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2010 – 2019
- 2011
[j6]Sherif A. Tawfik, Volkan Kursun
:
Multi-Threshold Voltage FinFET Sequential Circuits. IEEE Trans. Very Large Scale Integr. Syst. 19(1): 151-156 (2011)- 2010
- [j5]Sherif A. Tawfik, Volkan Kursun:
Dual Supply Voltages and Dual Clock Frequencies for Lower Clock Power and Suppressed Temperature-Gradient-Induced Clock Skew. IEEE Trans. Very Large Scale Integr. Syst. 18(3): 347-355 (2010)
2000 – 2009
- 2009
- [j4]Sherif A. Tawfik, Volkan Kursun:
Robust FinFET Memory Circuits with P-Type Data Access Transistors for Higher Integration Density and Reduced Leakage Power. J. Low Power Electron. 5(4): 497-508 (2009) - [j3]Sherif A. Tawfik, Volkan Kursun:
FinFET domino logic with independent gate keepers. Microelectron. J. 40(11): 1531-1540 (2009) - [j2]Sherif A. Tawfik, Volkan Kursun:
Low Power and High Speed Multi Threshold Voltage Interface Circuits. IEEE Trans. Very Large Scale Integr. Syst. 17(5): 638-645 (2009) - 2008
- [j1]Sherif A. Tawfik, Volkan Kursun:
Clock Distribution Networks with Gradual Signal Transition Time Relaxation for Reduced Power Consumption. J. Circuits Syst. Comput. 17(6): 1173-1191 (2008) - [c18]Sherif A. Tawfik, Volkan Kursun:
Multi-Vth FinFET sequential circuits with independent-gate bias and work-function engineering for reduced power consumption. APCCAS 2008: 348-351 - [c17]Sherif A. Tawfik, Volkan Kursun:
Asymmetric dual-gate multi-fin keeper bias options and optimization for low power and robust FinFET domino logic. APCCAS 2008: 1720-1723 - [c16]Sherif A. Tawfik, Volkan Kursun:
Work-function engineering for reduced power and higher integration density: An alternative to sizing for stability in FinFET memory circuits. ISCAS 2008: 788-791 - [c15]Sherif A. Tawfik, Volkan Kursun:
Low power and robust 7T dual-Vt SRAM circuit. ISCAS 2008: 1452-1455 - [c14]Sherif A. Tawfik, Volkan Kursun:
Dynamic wordline voltage swing for low leakage and stable static memory banks. ISCAS 2008: 1894-1897 - [c13]Zhiyu Liu, Sherif A. Tawfik, Volkan Kursun:
Statistical Data Stability and Leakage Evaluation of FinFET SRAM Cells with Dynamic Threshold Voltage Tuning under Process Parameter Fluctuations. ISQED 2008: 305-310 - [c12]Sherif A. Tawfik, Volkan Kursun:
Characterization of New Static Independent-Gate-Biased FinFET Latches and Flip-Flops under Process Variations. ISQED 2008: 311-316 - [c11]Sherif A. Tawfik, Volkan Kursun:
Compact FinFET Memory Circuits with P-Type Data Access Transistors for Low Leakage and Robust Operation. ISQED 2008: 855-860 - 2007
- [c10]Sherif A. Tawfik, Volkan Kursun:
Low Power and Stable FinFET SRAM with Static Independent Gate Bias for Enhanced Integration Density. ICECS 2007: 443-446 - [c9]Sherif A. Tawfik, Volkan Kursun:
Buffer Insertion and Sizing in Clock Distribution Networks with Gradual Transition Time Relaxation for Reduced Power Consumption. ICECS 2007: 845-848 - [c8]Sherif A. Tawfik, Volkan Kursun:
Low-Power Low-Voltage Hot-Spot Tolerant Clocking with Suppressed Skew. ISCAS 2007: 645-648 - [c7]Sherif A. Tawfik, Volkan Kursun:
Multi-Vth Level Conversion Circuits for Multi-VDD Systems. ISCAS 2007: 1397-1400 - [c6]Volkan Kursun, Sherif A. Tawfik, Zhiyu Liu:
Leakage-Aware Design of Nanometer SoC. ISCAS 2007: 3231-3234 - [c5]Sherif A. Tawfik, Volkan Kursun:
Dual signal frequencies and voltage levels for low power and temperature-gradient tolerant clock distribution. ISLPED 2007: 62-67 - [c4]Sherif A. Tawfik, Volkan Kursun:
Dual-V_DD Clock Distribution for Low Power and Minimum Temperature Fluctuations Induced Skew. ISQED 2007: 73-78 - [c3]Zhiyu Liu, Sherif A. Tawfik, Volkan Kursun:
An independent-gate FinFET SRAM cell for high data stability and enhanced integration density. SoCC 2007: 63-66 - [c2]Sherif A. Tawfik, Volkan Kursun:
Low-power high-performance FinFET sequential circuits. SoCC 2007: 145-148 - 2006
- [c1]Sherif A. Tawfik, Hossam A. H. Fahmy:
Algorithmic truncation of minimax polynomial coefficients. ISCAS 2006
Coauthor Index
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