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Journal Articles
- 2019
[j2]Monir Zaman, Mustafa M. Shihab, Ayse K. Coskun, Yiorgos Makris
:
CAPE: A cross-layer framework for accurate microprocessor power estimation. Integr. 68: 87-98 (2019)- 2018
- [j1]Mustafa M. Shihab, Jie Zhang, Myoungsoo Jung, Mahmut T. Kandemir:
ReveNAND: A Fast-Drift-Aware Resilient 3D NAND Flash Design. ACM Trans. Archit. Code Optim. 15(2): 17:1-17:26 (2018)
Conference and Workshop Papers
- 2023
- [c14]Zhaokun Han, Mohammed Shayan, Aneesh Dixit, Mustafa M. Shihab, Yiorgos Makris, Jeyavijayan Rajendran:
FuncTeller: How Well Does eFPGA Hide Functionality? USENIX Security Symposium 2023: 5809-5826 - 2022
- [c13]Alexander J. Edwards, Naimul Hassan, Dhritiman Bhattacharya, Mustafa M. Shihab, Peng Zhou, Xuan Hu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman:
Physically and Algorithmically Secure Logic Locking with Hybrid CMOS/Nanomagnet Logic Circuits. DATE 2022: 17-22 - 2021
- [c12]Naimul Hassan, Alexander J. Edwards, Dhritiman Bhattacharya, Mustafa M. Shihab, Varun Venkat, Peng Zhou, Xuan Hu, Shamik Kundu, Abraham Peedikayil Kuruvila, Kanad Basu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman:
Secure Logic Locking with Strain-Protected Nanomagnet Logic. DAC 2021: 127-132 - 2020
- [c11]Bo Hu, Mustafa M. Shihab, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen:
An Efficient MILP-Based Aging-Aware Floorplanner for Multi-Context Coarse-Grained Runtime Reconfigurable FPGAs. DATE 2020: 1526-1531 - [c10]Mustafa M. Shihab, Bharath Ramanidharan, Gaurav Rajavendra Reddy, Jingxiang Tian, William Swartz, Carl Sechen, Yiorgos Makris:
CASPER: CAD Framework for a Novel Transistor-Level Programmable Fabric. ISCAS 2020: 1-5 - [c9]Mustafa Munawar Shihab, Bharath Ramanidharan, Suraag Sunil Tellakula, Gaurav Rajavendra Reddy, Jingxiang Tian, Carl Sechen, Yiorgos Makris:
ATTEST: Application-Agnostic Testing of a Novel Transistor-Level Programmable Fabric. VTS 2020: 1-6 - 2019
- [c8]Mustafa M. Shihab, Jingxiang Tian, Gaurav Rajavendra Reddy, Bo Hu, William Swartz, Benjamin Carrión Schäfer, Carl Sechen, Yiorgos Makris:
Design Obfuscation through Selective Post-Fabrication Transistor-Level Programming. DATE 2019: 528-533 - [c7]Bo Hu, Jingxiang Tian, Mustafa M. Shihab, Gaurav Rajavendra Reddy, William Swartz, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen:
Functional Obfuscation of Hardware Accelerators through Selective Partial Design Extraction onto an Embedded FPGA. ACM Great Lakes Symposium on VLSI 2019: 171-176 - [c6]Bo Hu, Mustafa M. Shihab, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen:
Extending the Lifetime of Coarse-Grained Runtime Reconfigurable FPGAs by Balancing Processing Element Usage. FPT 2019: 291-294 - [c5]Mustafa M. Shihab, Vishwani D. Agrawal:
Energy Efficient Power Distribution on Many-Core SoC. VLSID 2019: 488-493 - 2018
- [c4]Monir Zaman, Mustafa M. Shihab, Ayse K. Coskun, Yiorgos Makris:
Towards a Cross-Layer Framework for Accurate Power Modeling of Microprocessor Designs. PATMOS 2018: 229-236 - 2016
- [c3]Mustafa M. Shihab, Jie Zhang, Shuwen Gao, Josep Sloan, Myoungsoo Jung:
Couture: Tailoring STT-MRAM for Persistent Main Memory. INFLOW@OSDI 2016 - 2015
- [c2]Jie Zhang, Gieseo Park, Mustafa M. Shihab, David Donofrio, John Shalf, Myoungsoo Jung:
OpenNVM: An open-sourced FPGA-based NVM controller for low level memory characterization. ICCD 2015: 666-673 - 2014
- [c1]Jie Zhang, Mustafa M. Shihab, Myoungsoo Jung:
Power, Energy, and Thermal Considerations in SSD-Based I/O Acceleration. HotStorage 2014
Informal and Other Publications
- 2023
- [i1]Zhaokun Han, Mohammed Shayan, Aneesh Dixit, Mustafa M. Shihab, Yiorgos Makris, Jeyavijayan Rajendran:
FuncTeller: How Well Does eFPGA Hide Functionality? CoRR abs/2306.05532 (2023)
Coauthor Index
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