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Kesava R. Talupuru

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Journal Articles

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2005
[j1]
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  - journals/jsa/ZengTC05
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  - https://dblp.org/rec/journals/jsa/ZengTC05
Zhihong Zeng, Kesava R. Talupuru, Maciej J. Ciesielski:
Functional test generation based on word-level SAT. J. Syst. Archit. 51(8): 488-511 (2005)

Conference and Workshop Papers

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2011
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  - conf/mtv/TalupuruA11
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Kesava R. Talupuru, Sanjai Athi:
Achieving Glitch-Free Clock Domain Crossing Signals Using Formal Verification, Static Timing Analysis, and Sequential Equivalence Checking. MTV 2011: 5-9
2008
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  - conf/vlsid/ShimTCY08
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Kyuho Shim, Kesava R. Talupuru, Maciej J. Ciesielski, Seiyang Yang:
Simulation Acceleration with HW Re-Compilation Avoidance. VLSI Design 2008: 487-491

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