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Debajit Basak
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2020 – today
- 2024
- [j7]Siji Huang
, Debajit Basak, Yanhang Chen
, Qifeng Huang
, Yifei Fan
, Jie Yuan
:
An Efficient 1.4-GS/s 10-bit Timing-Skew-Free Time-Interleaved SAR ADC With a Centralized Sampling Frontend. IEEE Trans. Very Large Scale Integr. Syst. 32(7): 1195-1204 (2024) - 2021
- [j6]Hetong Wang
, Debajit Basak
, Yang Zhang
, Kong-Pang Pun
:
A 0.59-mW 78.7-dB SNDR 2-MHz Bandwidth Active-RC Delta-Sigma Modulator With Relaxed and Reduced Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. 68(3): 1114-1122 (2021) - 2020
- [c5]Yang Zhang, Debajit Basak, Kong-Pang Pun:
A Highly Linear Multi-Level SC DAC in a Power-Efficient Gm-C Continuous-Time Delta-Sigma Modulator. ISCAS 2020: 1
2010 – 2019
- 2019
- [j5]Debajit Basak
, Sarthak Kalani
, Yang Zhang
, Kong-Pang Pun
:
An Automatic On-Chip Calibration Technique for Static and Dynamic DAC Error Correction in High-Speed Continuous-Time Delta-Sigma Modulators. IEEE Access 7: 172097-172109 (2019) - [j4]Yang Zhang
, Debajit Basak
, Kong-Pang Pun
:
A Highly Linear Multi-Level SC DAC in a Power-Efficient Gm-C Continuous-Time Delta-Sigma Modulator. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(12): 4592-4605 (2019) - [j3]Yang Zhang
, Debajit Basak
, Kong-Pang Pun
:
Power-Efficient Gm-C DSMs With High Immunity to Aliasing, Clock Jitter, and ISI. IEEE Trans. Very Large Scale Integr. Syst. 27(2): 337-349 (2019) - 2018
- [j2]Debajit Basak
, Daxiang Li
, Kong-Pang Pun
:
A Gm-C Delta-Sigma Modulator With a Merged Input-Feedback Gm Circuit for Nonlinearity Cancellation and Power Efficiency Enhancement. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(4): 1196-1209 (2018) - [j1]Daxiang Li
, Debajit Basak
, Yang Zhang, Zhongyi Fu
, Kong-Pang Pun
:
Improving Power Efficiency for Active-RC Delta-Sigma Modulators Using a Passive-RC Low-Pass Filter in the Feedback. IEEE Trans. Circuits Syst. II Express Briefs 65-II(11): 1559-1563 (2018) - [c4]Debajit Basak, Sarthak Kalani
, Peter R. Kinget
, Kong-Pang Pun:
An On-Chip Static and Dynamic DAC Error Correction Technique for High Speed Multibit Delta-Sigma Modulators. ISCAS 2018: 1-5 - 2017
- [c3]Daxiang Li, Yang Zhang, Debajit Basak, Kong-Pang Pun:
Continuous-time delta-sigma modulator with an upfront passive-RC low-pass network. ISOCC 2017: 9-10 - 2016
- [c2]Zhongyi Fu, Xian Tang, Daxiang Li, Jiangpeng Wang, Debajit Basak, Kong-Pang Pun:
A 10-bit 2 MS/s SAR ADC using reverse VCM-based switching scheme. ISCAS 2016: 1030-1033 - [c1]Debajit Basak, Kong-Pang Pun:
Gm-cell nonlinearity compensation technique using single-bit quantiser and FIR DAC in Gm-C based delta-sigma modulators. ISCAS 2016: 1510-1513
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last updated on 2024-07-20 21:19 CEST by the dblp team
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