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Jieqiong Du
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Journal Articles
- 2019
- [j3]Yuan Du, Li Du, Xuefeng Gu, Jieqiong Du, X. Shawn Wang, Boyu Hu, Mingzhe Jiang, Xiaoliang Chen, Subramanian S. Iyer, Mau-Chung Frank Chang:
An Analog Neural Network Computing Engine Using CMOS-Compatible Charge-Trap-Transistor (CTT). IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(10): 1811-1819 (2019) - 2018
- [j2]X. Shawn Wang, Xin Jin, Jieqiong Du, Yilei Li, Yuan Du, Chien-Heng Wong, Yen-Cheng Kuan, Chi-Hang Chan, Mau-Chung Frank Chang:
A 2-GS/s 8-Bit ADC Featuring Virtual-Ground Sampling Interleaved Architecture in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 65-II(11): 1534-1538 (2018) - 2017
- [j1]Yuan Du, Wei-Han Cho, Po-Tsang Huang, Yilei Li, Chien-Heng Wong, Jieqiong Du, Yanghyo Kim, Boyu Hu, Li Du, Chun-Chen Liu, Sheau Jiung Lee, Mau-Chung Frank Chang:
A 16-Gb/s 14.7-mW Tri-Band Cognitive Serial Link Transmitter With Forwarded Clock to Enable PAM-16/256-QAM and Channel Response Detection. IEEE J. Solid State Circuits 52(4): 1111-1122 (2017)
Conference and Workshop Papers
- 2024
- [c8]Dong-Myung Choi, Yikui Dong, Roan Nicholson, Frank Liu, Wenyan Jia, Vadim Levin, Mike He, Sameer Pradhan, Jieqiong Du, Michael De Vita, Amanda Tran, Reza Navid, Sitaraman Iyer, Rui Song:
A 4.6pJ/b 64Gb/s Transceiver Enabling PCIe 6.0 and CXL 3.0 in Intel 3 CMOS Technology. VLSI Technology and Circuits 2024: 1-2 - 2020
- [c7]Jieqiong Du, Jia Zhou, Chia-Jen Liang, Boyu Hu, Yuan Du, Mau-Chung Frank Chang:
A 28-mW 32-Gb/s/pin 16-QAM Single-Ended Transceiver for High-Speed Memory Interface. VLSI Circuits 2020: 1-2 - 2019
- [c6]Jieqiong Du, Chien-Heng Wong, Yo-Hao Tu, Wei-Han Cho, Yilei Li, Yuan Du, Po-Tsang Huang, Sheau Jiung Lee, Mau-Chung Frank Chang:
A 7.5-mW 10-Gb/s 16-QAM wireline transceiver with carrier synchronization and threshold calibration for mobile inter-chip communications in 16-nm FinFET. NOCS 2019: 16:1-16:8 - 2018
- [c5]Weikang Qiao, Jieqiong Du, Zhenman Fang, Michael Lo, Mau-Chung Frank Chang, Jason Cong:
High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms. FCCM 2018: 37-44 - [c4]Weikang Qiao, Jieqiong Du, Zhenman Fang, Libo Wang, Michael Lo, Mau-Chung Frank Chang, Jason Cong:
High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms: (Abstract Only). FPGA 2018: 291 - [c3]Yangjie Wei, Jieqiong Du, Yongjun Liu:
Nondestructive Image De-Blurring Based on Diffraction Blurring Model. ROBIO 2018: 1040-1045 - 2016
- [c2]Wei-Han Cho, Yilei Li, Yuan Du, Chien-Heng Wong, Jieqiong Du, Po-Tsang Huang, Sheau Jiung Lee, Huan-Neng Ron Chen, Chewnpu Jou, Fu-Lung Hsueh, Mau-Chung Frank Chang:
10.2 A 38mW 40Gb/s 4-lane tri-band PAM-4 / 16-QAM transceiver in 28nm CMOS for high-speed Memory interface. ISSCC 2016: 184-185 - [c1]Yuan Du, Wei-Han Cho, Yilei Li, Chien-Heng Wong, Jieqiong Du, Po-Tsang Huang, Yanghyo Kim, Zuow-Zun Chen, Sheau Jiung Lee, Mau-Chung Frank Chang:
A 16Gb/s 14.7mW tri-band cognitive serial link transmitter with forwarded clock to enable PAM-16 / 256-QAM and channel response detection in 28 nm CMOS. VLSI Circuits 2016: 1-2
Coauthor Index
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