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Hwa-Chyi Chiou

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2010 – 2019

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2019
[c2]
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  dblp key:
  - conf/icce-tw/HuangLLWNWCCJL19
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  persistent URL:
  - https://dblp.org/rec/conf/icce-tw/HuangLLWNWCCJL19
Shao-Chang Huang, Chih-Cherng Liao, Hsien-Feng Liao, Shou-Peng Weng, Karuna Nidhi, Yu-Kai Wang, Yi-Jen Chen, Hwa-Chyi Chiou, Yeh-Ning Jou, Jian-Hsing Lee:
Analyzing Gate-Driven Circuit Parameters for Adding ESD Performances. ICCE-TW 2019: 1-2
2015
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  - conf/ecctd/LiaoTKYCHTJL15
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Seian-Feng Liao, Kai-Neng Tang, Ming-Dou Ker, Jia-Rong Yeh, Hwa-Chyi Chiou, Yeh-Jen Huang, Chun-Chien Tsai, Yeh-Ning Jou, Geeng-Lih Lin:
Impact of guard ring layout on the stacked low-voltage PMOS for high-voltage ESD protection. ECCTD 2015: 1-4

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