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ORCIDDouglas R. Melo
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2020 – today
- 2024
[c15]Luiz Fernando Heidrich Duarte, George B. Nardes, Wesley Grignani, Douglas R. Melo, Cesar A. Zeferino:
Deep Nibble: A 4-bit Number Format for Efficient DNN Training and Inference in FPGA. SBCCI 2024: 1-5- 2023
- [c14]Wesley Grignani
, Douglas A. dos Santos, Luigi Dilillo, Felipe Viel, Douglas R. Melo:
A Low-Cost Hardware Accelerator for CCSDS 123 Lossless Hyperspectral Image Compression. DFT 2023: 1-6 - [c13]Carolina Imianosky, Douglas A. dos Santos, Douglas R. Melo, Felipe Viel, Luigi Dilillo:
Implementation and Reliability Evaluation of a RISC-V Vector Extension Unit. DFT 2023: 1-6 - [c12]Benjamin W. Mezger, Douglas A. dos Santos, Luigi Dilillo, Douglas R. Melo:
Hardening a Real-Time Operating System for a Dependable RISC-V System-on-Chip. DFT 2023: 1-6 - [c11]Douglas A. dos Santos, André Martins Pio de Mattos, Douglas R. Melo, Luigi Dilillo:
Characterization of a Fault-Tolerant RISC-V System-on-Chip for Space Environments. DFT 2023: 1-6 - [c10]André Martins Pio de Mattos, Douglas A. dos Santos, Carolina Imianosky, Douglas R. Melo, Luigi Dilillo:
Using HARV-SoC for Reliable Sensing Applications in Radiation Harsh Environments. IWASI 2023: 227-232 - 2022
- [j4]Benjamin W. Mezger, Douglas A. dos Santos, Luigi Dilillo, Cesar A. Zeferino, Douglas R. Melo:
A Survey of the RISC-V Architecture Software Support. IEEE Access 10: 51394-51411 (2022) - [c9]Douglas A. dos Santos, André Martins Pio de Mattos, Lucas M. Luza, Carlo Cazzaniga, Maria Kastriotou, Douglas R. Melo, Luigi Dilillo:
Neutron Irradiation Testing and Analysis of a Fault-Tolerant RISC-V System-on-Chip. DFT 2022: 1-6 - 2021
- [j3]Rodrigo V. M. Pereira, Laio Oriel Seman, Marcelo Daniel Berejuck, Douglas Rossi de Melo, Analúcia Schiaffino Morales, Eduardo Augusto Bezerra:
MPI hardware framework for many-core based embedded systems. Int. J. Sens. Networks 35(1): 42-56 (2021) - [c8]Douglas Rossi Melo, César Albenes Zeferino, Eduardo Augusto Bezerra, Luigi Dilillo:
Design and Evaluation of Implementation Impact on a Fault-Tolerant Network-on-Chip Router. DTIS 2021: 1-6 - [c7]Douglas A. dos Santos, Lucas M. Luza, Maria Kastriotou, Carlo Cazzaniga, Cesar A. Zeferino, Douglas R. Melo, Luigi Dilillo:
Characterization of a RISC-V System-on-Chip under Neutron Radiation. DTIS 2021: 1-6 - 2020
- [c6]Douglas Almeida dos Santos, Lucas Matana Luza, César Albenes Zeferino, Luigi Dilillo, Douglas Rossi de Melo:
A Low-Cost Fault-Tolerant RISC-V Processor for Space Systems. DTIS 2020: 1-5
2010 – 2019
- 2019
- [j2]Douglas R. Melo, Cesar A. Zeferino, Luigi Dilillo, Eduardo A. Bezerra:
Maximizing the Inner Resilience of a Network-on-Chip through Router Controllers Design. Sensors 19(24): 5416 (2019) - [c5]Dario Asciolla, Luigi Dilillo, Douglas A. dos Santos, Douglas R. Melo, Alessandra Menicucci, Marco Ottavi:
Characterization of a RISC-V Microcontroller Through Fault Injection. ApplePies 2019: 91-101 - [c4]Lucas M. V. Pereira, Douglas A. dos Santos, Cesar A. Zeferino, Douglas R. Melo:
A Low-Cost Hardware Accelerator for CCSDS 123 Predictor in FPGA. ISCAS 2019: 1-5 - [c3]Douglas Rossi de Melo, César Albenes Zeferino, Luigi Dilillo, Eduardo Augusto Bezerra:
Analyzing the Error Propagation in a Parameterizable Network-on-Chip Router. LATS 2019: 1-6 - 2018
- [c2]Guilherme F. Weidle, Felipe Viel, Douglas Rossi de Melo, Cesar A. Zeferino:
A Hardware Accelerator for Anisotropic Diffusion Filtering in FPGA. ISCAS 2018: 1-5 - [c1]Lucas M. V. Pereira, Douglas R. Melo, Cesar A. Zeferino, Eduardo A. Bezerra:
Analysis of LEON3 systems integration for a Network-on-Chip. LATS 2018: 1-3 - 2014
- [j1]Douglas R. Melo, Michelle S. Wangham, Cesar A. Zeferino:
XIRU: Interface de Rede Extensível para Integração de Núcleos a uma Rede-em-Chip. RITA 21(2): 10-31 (2014)
Coauthor Index
aka: Douglas Almeida dos Santos
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